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參數(shù)資料
| 型號(hào)： | M68HC16Y1CFC |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, MROM, MICROCONTROLLER, PQFP16 |
| 封裝： | QFP-160 |
| 文件頁數(shù)： | 7/138頁 |
| 文件大?。?/td> | 784K |
| 代理商： | M68HC16Y1CFC |
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MOTOROLA
MC68HC16Y1
104
MC68HC16Y1TS/D
PMCPAR determines which of the SPI pins, with the exception of the SCK pin (the state of which is
determined by the SPI enable bit), are actually used by the SPI submodule, and which pins are available
for general-purpose I/O. SPI pins designated by PMCPAR as general-purpose I/O are controlled only
by DDRMC and PORTMC; the SPI has no effect on these pins. PMCPAR does not affect the operation
of the SCI submodule.
SS — Slave Select
MOSI — Master Out Slave In
MISO — Master In Slave Out
0 = Pin is used for general-purpose I/O
1 = Pin is used by SPI
DDRMC determines whether a general-purpose I/O pin is an input or an output. During reset, all MCCI
pins are configured as general-purpose inputs.
0 = Input
1 = Output
7.2 Serial Peripheral Interface
The SPI submodule communicates with external devices via a synchronous serial bus. The SPI is fully
compatible with SPI systems found on other Motorola products, but has enhanced capabilities. The SPI
can perform full-duplex three-wire or half-duplex two-wire transfers.
7.2.1 SPI Pins
The SPI uses four bidirectional pins. These pins may be configured for general-purpose I/O when not
needed for SPI application. The following table shows SPI pin functions
PMCPAR — MCCI Pin Assignment Register
$YFFC08
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
RESERVED
0
SS
0
MOSI
MISO
RESET:
0
DDRMC — MCCI Data Direction Register
$YFFC0B
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
RESERVED
TXDA
RXDA
TXDB
RXDB
SS
SCK
MOSI
MISO
RESET:
0
Table 30 SPI Pin Function
Pin Names
Mode
Function
Master In Slave Out (MISO)
Master
Slave
Provides serial data input to the SPI
Provides serial data output from the SPI
Master Out Slave In (MOSI)
Master
Slave
Provides serial output from the SPI
Provides serial input to the SPI
Serial Clock (SCK)
Master
Slave
Provides clock output from SPI
Provides clock input to SPI
Slave Select (SS)
Master
Slave
Causes mode fault
Initiates serial transfer
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