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參數(shù)資料
| 型號： | M68HC16Y1CFC |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, MROM, MICROCONTROLLER, PQFP16 |
| 封裝： | QFP-160 |
| 文件頁數(shù)： | 13/138頁 |
| 文件大?。?/td> | 784K |
| 代理商： | M68HC16Y1CFC |
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MC68HC16Y1
MOTOROLA
MC68HC16Y1TS/D
11
2.4 Condition Code Register
The condition code register can be considered as two functional blocks. The MSB, which corresponds
to the CCR in the M68HC11, contains the low-power stop control bit and processor status flags. The
LSB contains the interrupt priority field, the DSP saturation mode control bit, and the program counter
address extension field.
S — STOP Enable
0 = Stop clock when LPSTOP instruction is executed.
1 = Perform NOP when LPSTOP instruction is executed.
MV — Accumulator M overflow flag
Set when overflow into the accumulator M sign bit (AM35) has occurred.
H — Half Carry Flag
Set when a carry from bit 3 in accumulators A or B occurs during BCD addition.
EV — Extension Bit Overflow Flag
Set when an overflow into bit 31 of accumulator M has occurred.
N — Negative Flag
Set when the MSB of a result register is set.
Z — Zero Flag
Set when all bits of a result register are zero.
V — Overflow Flag
Set when twos complement overflow occurs as the result of an operation.
C — Carry Flag
Set when a carry or borrow occurs during arithmetic operation. Also used during shift and rotate oper-
ations to facilitate multiple word operations.
INT[2:0] — Interrupt Priority Mask
The value of this field ($0 to $7) specifies the CPU16 interrupt priority level.
SM — Saturate Mode Bit
When SM is set, if either EV or MV is set, data read from accumulator M using TMRT or TMET will be
given maximum positive or negative value, depending on the state of the AM sign bit before overflow.
PK[3:0] — Program Counter Address Extension Field
This field is concatenated with the program counter to form a 20-bit pseudolinear address.
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S
MV
H
EV
N
Z
V
C
INT
SM
PK
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