參數(shù)資料
型號(hào): M68HC16Y1CFC
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 16-BIT, MROM, MICROCONTROLLER, PQFP16
封裝: QFP-160
文件頁數(shù): 3/138頁
文件大?。?/td> 784K
代理商: M68HC16Y1CFC
MOTOROLA
MC68HC16Y1
100
MC68HC16Y1TS/D
7 Multichannel Communication Interface
The MCCI contains three serial interfaces: two serial communication interfaces (SCI) and a serial pe-
ripheral interface (SPI). The figure below is a block diagram of the MCCI.
Figure 14 MCCI Block Diagram
The SCI provide standard nonreturn to zero (NRZ) mark/space format. Either will operate in full- or half-
duplex mode — there are separate transmitter and receiver enable bits and dual data buffers for each
interface. A modulus-type baud rate generator provides rates from 64 to 524 kbaud (with a 16.78-MHz
system clock). Word length of either 8 or 9 bits is software selectable. Optional parity generation and
detection provide either even or odd parity check capability. Advanced error detection circuitry catches
glitches of up to 1/16 of a bit time in duration. Wakeup functions allow the CPU to run uninterrupted until
meaningful data is available.
The SPI provides easy peripheral expansion or interprocessor communication via a full-duplex, syn-
chronous, three-line bus: data in, data out, and a serial clock. The SPI is compatible with SPI interfaces
found in other Motorola devices, but contains enhanced operational features, such as programmable
shift direction.
MCCI pins can also be configured for use in 8-bit general-purpose I/O port MC.
BUS INTERFACE UNIT
SERIAL PERIPHERAL
INTERFACE
(SPI)
SERIAL
COMMUNICATION
INTERFACE A
(SCI–A)
SERIAL
COMMUNICATION
INTERFACE B
(SCI–B)
PMC7/TXDA
PMC6/RXDA
PMC4/RXDB
PMC5/TXDB
PMC2/SCK
PMC1/MOSI
PMC0/MISO
PMC3/SS
PORT
MC
INTERMODULE BUS (IMB)
"MCCI BLOCK"
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