MOTOROLA
MC68341 USER’S MANUAL
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CENTRAL PROCESSING UNIT
The CPU32 is a powerful central processor that supervises system function, makes
decisions, manipulates data, and directs I/O. A special debugging mode simplifies
processor emulation during system debug.
CPU32
The CPU32 is a 68000-based microprocessor that can execute most 32-bit operations in
two clock periods. Additional instructions enhance lookup table interpolation and power
consumption control. In addition to performing basic instruction execution, the CPU32
provides a sophisticated background debug port for non-invasive instrumentation in the
software development and debug environments.
On-Chip Peripherals
To improve total system throughput and reduce part count, board size, and cost of system
implementation, the M68300 family integrates on-chip, intelligent peripheral modules, and
typical glue logic. These functions on the MC68341 include the SIM41, a DMA controller,
a serial module, a queued serial peripheral interface, and a timer.
The IMB is the backbone of the MC68341, and is similar to traditional external buses with
address, data, clock, interrupt, arbitration, and handshake signals. Because bus masters
(like the CPU32 and DMA), peripherals, and the SIM41 are on the same processor, the
IMB ensures that communication between these modules is fully synchronized and that
arbitration and interrupts can be handled in parallel with data transfers, greatly improving
system performance. Internal accesses across the IMB can be monitored from outside of
the processor.
System Integration Module
The MC68341 system integration module (SIM41) handles a wide array of functions,
eliminating the need for much of the glue logic which typically supports the microprocessor
and its interface with peripherals and external memory. The SIM41 includes:
External Bus Interface—Transfers information between the CPU32 or DMA controller
and external memory or peripherals by providing up to 32 address lines and 16 data
lines. Both the 68300 bus interface and the original MC68000 bus interface are
provided.
System Configuration and Protection—Achieves maximum system protection by
providing various monitors and timers to prevent system lockup, recover from
catastrophic failure, exit infinite loops, provide refresh, etc.
Clock Synthesizer—Generates the clock signals used by all internal operations as
well as a clock output used by external devices.
Chip Select and Wait State Generation—Offers eight programmable chip selects
which provide signals to enable external memory and peripheral circuits and create all
external handshaking and timing signals. Up to six wait states can be automatically
inserted.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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