MOTOROLA
MC68341 USER’S MANUAL
7- 41
FFULL—FIFO Full
1 = A character was transferred from the receiver shift register to the receiver FIFO
and the transfer caused the FIFO to become full (all three FIFO holding register
positions are occupied).
0 = The CPU32 has read the receiver buffer and one or more FIFO positions are
available. Note that if there is a character in the receiver shift register because
the FIFO is full, this character will be moved into the FIFO when a position is
available, and the FIFO will remain full.
RxRDY—Receiver Ready
1 = A character has been received and is waiting in the FIFO to be read by the
CPU32. This bit is set when a character is transferred from the receiver shift
register to the FIFO.
0 = The CPU32 has read the receiver buffer, and no characters remain in the FIFO
after this read.
7.4.1.17 TRANSMITTER BUFFER (TB). The TB consists of two registers, the transmitter
holding register and the transmitter shift register (see Figure 7-4). The holding register
accepts characters from the bus master if the TxRDY bit in the channel's SR is set. A write
to the TB clears the TxRDY bit, inhibiting any more characters until the shift register is
ready to accept more data. When the shift register is empty, it checks to see if the holding
register has a valid character to be sent (TxRDY bit cleared). If there is a valid character,
the shift register loads the character and reasserts the TxRDY bit in the channel's SR.
Writes to the TB when the channel's SR TxRDY bit is clear and when the transmitter is
disabled have no effect on the TB. This register can only be written when the serial
module is enabled (i.e., the STP bit in the MCR is cleared).
TBA, TBB
$713, $71B
76543210
TB7
TB6
TB5
TB4
TB3
TB2
TB1
TB0
RESET:
00000000
Write Only
Supervisor/User
TB7–TB0—These bits contain the character in the TB.
7.4.2 Programming
The basic interface software flowchart required for operation of the serial module is shown
in Figure 7-10. The routines are divided into three categories:
Serial Module Initialization
I/O Driver
Interrupt Handling
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