參數(shù)資料
型號: MC68HC05C0B
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, 4 MHz, MICROCONTROLLER, PDIP42
封裝: SDIP-42
文件頁數(shù): 21/96頁
文件大小: 357K
代理商: MC68HC05C0B
Section 4: Interrupts
MOTOROLA
Page 19
MC68HC05C0 Specification Rev. 1.2
SECTION 4
INTERRUPTS
The MCU can be interrupted six different ways: one maskable external interrupt: IRQ, four
software selectable maskable interrupts: Serial Communications Interface (SCI), 16-Bit
Timer (TIM), Multi-Function Timer (MFT), Keyboard Scan (KEY), and the nonmaskable
software interrupt instruction (SWI).
If the interrupt mask bit (I bit) of the CCR is set, all maskable interrupts (internal and
external) are disabled. Clearing the I bit enables interrupts.
Interrupts cause the processor to save register contents on the stack and to set the interrupt
mask (I bit) to prevent additional interrupts. The RTI instruction causes the register contents
to be recovered from the stack and normal processing to resume.
Unlike Reset, hardware interrupts do not cause the current instruction execution to be
halted, but are considered pending until the current instruction is complete.
NOTE:
The current instruction is the one already fetched and being operated on.
When the current instruction is complete, the processor checks all pending hardware
interrupts. If interrupts are not masked (CCR I bit clear) the processor proceeds with
interrupt processing; otherwise, the next instruction is fetched and executed.
The SWI is executed the same as any other instruction, regardless of the I-bit state.
Table 4-1 lists vector addresses in order of priority for all interrupts including Reset.
Table 4-1: Vector Address for Interrupts and Reset
Register
N/A
TSR
SCSR
TCSR
N/A
Flag
Name
N/A
ICF
OCF
TOF
TDRE
TC
OR/RDRF
IDLE
TOF
RTIF
N/A
Interrupts
Reset
Software
External Interrupt
16-Bit Timer
Serial Comm. Interface
Multi-Function Timer
Keyboard Scan
CPU
Interrupt
RESET
SWI
IRQ
TIM
SCI
MFT
KEY
Vector Address
$FFFE-$FFFF
$FFFC-$FFFD
$FFFA-$FFFB
$FFF8-$FFF9
$FFF6-$FFF7
$FFF4-$FFF5
$FFF2-$FFF3
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