Signal Descriptions
MCF5272 ColdFire Integrated Microprocessor User’s Manual, Rev. 3
Freescale Semiconductor
19-15
H8
GND
Ground
—
GND
H9
GND
Ground
—
GND
H10
VDD
+3.3V
—
VDD
H11
D10
PC10
—
D10/PC10
D10/port C bit 10
I/O
H12
SDBA1
—
SDBA1
SDRAM bank 1 select
O
H13
D31
D15
—
D31/D15
I/O
H14
D30
D14
—
D30/D14
I/O
J1
USB_CLK
—
USB_CLK
USB external 48-MHz
clock input
I
J2
PA8
FSC0/
FSR0
—
PA8/FSC0/FSR0
Port A bit 8/IDL FSR0 &
GCI FSC0
I/O
J3
PA9
DGNT0
—
PA9/DGNT0
Port A bit 9//IDL DGNT0
I/O
J4
High Z
DCL0
URT1_CLK
—
DCL0/URT1_CLK
Port 0 data clock/UART1
baud clock
I
J5
VDD
+3.3V
—
VDD
J6
VDD
+3.3V
—
VDD
J7
GND
Ground
—
GND
J8
GND
Ground
—
GND
J9
VDD
+3.3V
—
VDD
J10
VDD
+3.3V
—
VDD
J11
D7
PC7
—
D7/PC7
D7/port C bit 7
I/O
J12
D8
PC8
—
D8/PC8
D8/port C bit 8
I/O
J13
D9
PC9
—
D9/PC9
D9/port C bit 9
I/O
J14
SDBA0
—
SDBA0
SDRAM bank 0 select
O
K1
High Z
DIN0
URT1_RxD
—
DIN0/URT1_RxD
IDL/GCI data in/UART1
Rx data
I
K2
High Z
—
URT1_
CTS
QSPI_
CS2
URT1_CTS/QSPI_CS2
UART1 CTS/QSPI_CS2
I/O
K3
High Z
—
URT1_RTS
INT5
URT1_RTS/INT5
UART1 RTS/INT5
I/O
K4
High Z
DOUT0
URT1_TxD
—
DOUT0/URT1_TxD
IDL-GCI data Out/UART1
Tx data
O
K5
PA10
DREQ0
—
PA10/DREQ0
Port A bit 10/IDL DREQ0
I/O
K6
High Z
PWM_
OUT2
TIN1
—
PWM_OUT2/TIN1
PWM output compare 2
/Timer 1 input
I/O
K7
VDD
+3.3V
—
VDD
K8
VDD
+3.3V
—
VDD
Table 19-2. Signal Name and Description by Pin Number (Sheet 5 of 8)
Map
BGA
Pin
Pin Functions
Name
Description
I/O
0 (Reset)
1
2
3