System Integration Module (SIM)
MCF5272 ColdFire Integrated Microprocessor User’s Manual, Rev. 3
6-8
Freescale Semiconductor
Table 6-5. PMR Field Descriptions
Bits
Field
Description
31
BDMPDN
Debug power-down enable. Controls the clocking to the debug module.
0 Clock enabled.
1 Clock disabled.
30–27
—
Reserved, should be cleared.
26
ENETPDN
Ethernet power-down enable. Controls the clocking to the ethernet module.
0 Clock enabled.
1 Clock disabled.
25
PLIPDN
PLIC power-down enable. Controls the clocking to the PLIC module.
0 Clock enabled.
1 Clock disabled.
24
DRAMPDN
DRAM controller power-down enable. Controls the clocking to the DRAM controller module.
0 Clock enabled.
1 Clock disabled.
23
DMAPDN
DMA controller power-down enable. Controls the clocking to the DMA controller module.
0 Clock enabled.
1 Clock disabled.
22
PWMPDN
PWM power-down enable. Controls the clocking to the PWM module.
0 Clock enabled.
1 Clock disabled.
21
QSPIPDN
QSPI power-down enable. Controls the clocking to the QSPI module.
0 Clock enabled.
1 Clock disabled.
20
TIMERPDN
Timer power-down enable. Controls the clocking to the timer module.
0 Clock enabled.
1 Clock disabled.
19
GPIOPDN
Parallel port power-down enable. Controls the clocking to the parallel port module.
0 Clock enabled.
1 Clock disabled.
18
USBPDN
USB power-down enable. Controls the clocking to the USB module. Clocking to the USB module may
be turned on by USD_D+ or INT1/USB_WOR, at which time this bit is automatically cleared.
0 Clock enabled.
1 Clock disabled.
17
UART1PDN
UART1 power-down enable. Controls the clocking to the UART1 module. Clocking to the UART1
module may be restored when a change in signal level is detected on UART1RxD, at which time this
bit is automatically cleared.
0 Clock enabled.
1 Clock disabled.
16
UART0PDN
UART0 power-down enable. Controls the clocking to the UART0 module. Clocking to the UART0
module may be restored when a change in signal level is detected on UART0RxD, at which time this
bit is automatically cleared.
0 Clock enabled.
1 Clock disabled.
15-11
—
Reserved, should be cleared.