Hardware Multiply/Accumulate (MAC) Unit
MCF5272 ColdFire Integrated Microprocessor User’s Manual, Rev. 3
3-4
Freescale Semiconductor
3.1.3
MAC Instruction Set Summary
The MAC unit supports the integer multiply operations defined by the baseline ColdFire architecture and
the new multiply-accumulate instructions.
Table 3-1 summarizes the MAC unit instruction set.
3.1.4
Data Representation
The MAC unit supports three basic operand types:
Two’s complement signed integer: In this format, an N-bit operand represents a number within the
range -2(N-1) < operand < 2(N-1) - 1. The binary point is to the right of the least significant bit.
Two’s complement unsigned integer: In this format, an N-bit operand represents a number within
the range 0 < operand < 2N - 1. The binary point is to the right of the least significant bit.
Two’s complement, signed fractional: In an N-bit number, the first bit is the sign bit. The remaining
bits signify the first N-1 bits after the binary point. Given an N-bit number, aN-1aN-2aN-3... a2a1a0,
its value is given by the following formula:
This format can represent numbers in the range –1 < operand < 1 – 2(N-1).
For words and longwords, the greatest negative number that can be represented is –1, whose
internal representation is 0x8000 and 0x0x8000_0000, respectively. The most positive word is
0x7FFF or (1 - 2-15); the most positive longword is 0x7FFF_FFFF or (1 - 2-31).
3.2
MAC Instruction
Execution Timings
Table 3-1. MAC Instruction Summary
Instruction
Mnemonic
Description
Multiply Signed
MULS <ea>y,Dx
Multiplies two signed operands yielding a signed result
Multiply Unsigned
MULU <ea>y,Dx
Multiplies two unsigned operands yielding an unsigned result
Multiply Accumulate
MAC Ry,RxSF
MSAC Ry,RxSF
Multiplies two operands, then adds or subtracts the product to/from
the accumulator
Multiply Accumulate with
Load
MAC Ry,RxSF,Rw
MSAC Ry,RxSF,Rw
Multiplies two operands, then adds or subtracts the product to/from
the accumulator while loading a register with the memory operand
Load Accumulator
MOV.L {Ry,#imm},ACC
Loads the accumulator with a 32-bit operand
Store Accumulator
MOV.L ACC,Rx
Writes the contents of the accumulator to a register
Load MACSR
MOV.L {Ry,#imm},MACSR
Writes a value to the MACSR
Store MACSR
MOV.L MACSR,Rx
Writes the contents of MACSR to a register
Store MACSR to CCR
MOV.L MACSR,CCR
Writes the contents of MACSR to the processor’s CCR register
Load MASK
MOV.L {Ry,#imm},MASK
Writes a value to MASK
Store MASK
MOV.L MASK,Rx
Writes the contents of MASK to a register
2
i1
N
–
+
()
ai
i0
=
N2
–
∑
+