參數(shù)資料
型號(hào)： MCV18ET-I/SO
元件分類： 微控制器/微處理器
英文描述： FLASH, 20 MHz, RISC MICROCONTROLLER, PDSO18
封裝： 7.50 MM, LEAD FREE, SOIC-18
文件頁(yè)數(shù)： 31/108頁(yè)
文件大?。?/td> 1509K
代理商： MCV18ET-I/SO
2009 Microchip Technology Inc.
DS41399A-page 29
MCV18E
4.0
TIMER0 MODULE
The Timer0 module is an 8-bit timer/counter with the
following features:
8-bit timer/counter register (TMR0)
8-bit prescaler (shared with Watchdog Timer)
Programmable internal or external clock source
Programmable external clock edge selection
Interrupt on overflow
Figure 4-1 is a block diagram of the Timer0 module.
4.1
Timer0 Operation
When used as a timer, the Timer0 module can be used
as either an 8-bit timer or an 8-bit counter.
4.1.1
8-BIT TIMER MODE
When used as a timer, the Timer0 module will
increment every instruction cycle (without prescaler).
Timer mode is selected by clearing the T0CS bit of the
OPTION register to ‘0’.
When TMR0 is written, the increment is inhibited for
two instruction cycles immediately following the write.
4.1.2
8-BIT COUNTER MODE
When used as a counter, the Timer0 module will
increment on every rising or falling edge of the T0CKI
pin. The incrementing edge is determined by the T0SE
bit of the OPTION register. Counter mode is selected by
setting the T0CS bit of the OPTION register to ‘1’.
FIGURE 4-1:
BLOCK DIAGRAM OF THE TIMER0/WDT PRESCALER
Note:
The value written to the TMR0 register can
be adjusted, in order to account for the two
instruction cycle delay when TMR0 is
written.
T0CKI
T0SE
pin
TMR0
Watchdog
Timer
WDT
Time-out
PS<2:0>
WDTE
Data Bus
Set Flag bit T0IF
on Overflow
T0CS
Note
1:
T0SE, T0CS, PSA, PS<2:0> are bits in the OPTION register.
2:
WDTE bit is in the Configuration Word register.
0
1
0
1
0
1
8
8-bit
Prescaler
0
1
FOSC/4
PSA
31 kHz
INTOSC
Sync
2 TCY
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