參數(shù)資料
型號: MCV18ET-I/SO
元件分類: 微控制器/微處理器
英文描述: FLASH, 20 MHz, RISC MICROCONTROLLER, PDSO18
封裝: 7.50 MM, LEAD FREE, SOIC-18
文件頁數(shù): 75/108頁
文件大小: 1509K
代理商: MCV18ET-I/SO
2009 Microchip Technology Inc.
DS41399A-page 69
MCV18E
9.5
Power-up Timer (PWRT)
The Power-up Timer provides a fixed nominal time-out,
on power-up only, from the POR. The Power-up Timer
operates on an internal RC oscillator. The chip is kept
in Reset as long as the PWRT is active. The PWRT’s
time delay allows VDD to rise to an acceptable level.
The power-up timer enable Configuration bit, PWRTE,
is provided to enable/disable the PWRT.
The power-up time delay will vary from chip-to-chip due
to VDD, temperature and process variation. See AC
parameters for details.
9.6
Oscillator Start-up Timer (OST)
The Oscillator Start-up Timer (OST) provides a 1024
oscillator cycle (from OSC1 input) delay after the
PWRT delay is over. This ensures that the crystal
oscillator or resonator has started and stabilized. See
AC parameters for details.
The OST time-out is invoked only for XT, LP and HS
modes and only on Power-on Reset or wake-up from
Sleep.
9.7
Programmable Brown-Out Reset
(PBOR)
The MCV18E has on-chip Brown-out Reset circuitry. A
Configuration bit, BOREN, can disable (if clear/
programmed) or enable (if set) the Brown-out Reset
circuitry.
The BORV Configuration bit selects the programmable
Brown-out Reset threshold voltage (VBOR). When
BORV is 1,
VBOR IS 4.0V. When BORV is 0, VBOR is
2.5V
A Brown-out Reset occurs when VDD falls below VBOR
for a time greater than parameter TBOR (see Table 10-4).
A Brown-out Reset is not guaranteed to occur if VDD falls
below VBOR for less than parameter TBOR.
On any Reset (Power-on, Brown-out, Watchdog, etc.)
the chip will remain in Reset until VDD rises above
VBOR. The Power-up Timer will be invoked and will
keep the chip in Reset an additional 72 ms only if the
Power-up Timer enable bit in the Configuration register
is set to 0 (PWRTE = 0).
If the Power-up Timer is enabled and VDD drops below
VBOR while the Power-up Timer is running, the chip will
go back into a Brown-out Reset and the Power-up
Timer will be re-initialized. Once VDD rises above VBOR,
the Power-up Timer will execute a 72 ms Reset. See
For operations where the desired brown-out voltage is
other than 4.0V or 2.5V, an external brown-out circuit
show examples of external Brown-out Protection
circuits.
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