參數(shù)資料
型號: MCV18ET-I/SO
元件分類: 微控制器/微處理器
英文描述: FLASH, 20 MHz, RISC MICROCONTROLLER, PDSO18
封裝: 7.50 MM, LEAD FREE, SOIC-18
文件頁數(shù): 47/108頁
文件大?。?/td> 1509K
代理商: MCV18ET-I/SO
2009 Microchip Technology Inc.
DS41399A-page 43
MCV18E
7.1.5
INTERRUPTS
The ADC module allows for the ability to generate an
interrupt upon completion of an Analog-to-Digital
conversion. The ADC interrupt flag is the ADIF bit in the
PIR1 register. The ADC interrupt enable is the ADIE bit
in the PIE1 register. The ADIF bit must be cleared in
software.
This interrupt can be generated while the device is
operating or while in Sleep. If the device is in Sleep, the
interrupt will wake-up the device. Upon waking from
Sleep, the next instruction following the SLEEP
instruction is always executed. If the user is attempting
to wake-up from Sleep and resume in-line code
execution, the global interrupt must be disabled. If the
global interrupt is enabled, execution will switch to the
Interrupt Service Routine.
information.
Note:
The ADIF bit is set at the completion of
every conversion, regardless of whether
or not the ADC interrupt is enabled.
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