參數(shù)資料
型號: MCV18ET-I/SO
元件分類: 微控制器/微處理器
英文描述: FLASH, 20 MHz, RISC MICROCONTROLLER, PDSO18
封裝: 7.50 MM, LEAD FREE, SOIC-18
文件頁數(shù): 95/108頁
文件大?。?/td> 1509K
代理商: MCV18ET-I/SO
2009 Microchip Technology Inc.
DS41399A-page 87
MCV18E
TABLE 10-2:
EXTERNAL CLOCK TIMING REQUIREMENTS
Param
No.
Sym
Characteristic
Min
Typ
Max
Units
Conditions
1A
FOSC
Ext. Clock Input Frequency(1)
DC
4
MHz RC and XT Osc modes
DC
20
MHz HS Osc mode
DC
200
kHz
LP Osc mode
Oscillator Frequency(1)
DC
4
MHz RC Osc mode
0.1
4
MHz XT Osc mode
4
20
MHz HS Osc mode
5
200
kHz
LP Osc mode
1TOSC
External CLKIN Period(1)
250
ns
RC and XT Osc modes
50
ns
HS Osc mode
5—
μs
LP Osc mode
Oscillator Period(1)
250
ns
RC Osc mode
250
10,000
ns
XT Osc mode
50
250
ns
HS Osc mode
5—
μs
LP Osc mode
2
Tcy
Instruction Cycle Time(1)
200
DC
ns
TCY = 4/FOSC
3*
TosL,
TosH
External Clock in (OSC1) High or
Low Time
100
ns
XT oscillator
2.5
μs
LP oscillator
15
ns
HS oscillator
4*
TosR,
TosF
External Clock in (OSC1) Rise or
Fall Time
25
ns
XT oscillator
50
ns
LP oscillator
15
ns
HS oscillator
*
These parameters are characterized but not tested.
Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance
only and are not tested.
Note 1:
Instruction cycle period (TCY) equals four times the input oscillator time base period. All specified values
are based on characterization data for that particular oscillator type under standard operating conditions
with the device executing code. Exceeding these specified limits may result in an unstable oscillator
operation and/or higher than expected current consumption. All devices are tested to operate at “min”
values with an external clock applied to the OSC1/CLKIN pin.
When an external clock input is used, the “Max” cycle time limit is “DC” (no clock) for all devices.
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