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參數(shù)資料
| 型號： | ML60852 |
| 廠商： | OKI SEMICONDUCTOR CO., LTD. |
| 英文描述： | USB Device Controller |
| 中文描述： | USB設(shè)備控制器 |
| 文件頁數(shù)： | 19/81頁 |
| 文件大?。?/td> | 451K |
| 代理商： | ML60852 |
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PEDL60852-01
1
Semiconductor
ML60852
19/81
(2) EP0 Receive packet ready interrupt
This is used mainly during the reception of a data packet in a control write transfer.
Operation
Source of operation
ML60852
Description (conditions, responses, etc.)
The EP0 receive packet ready bit (D0 of EP0STAT) is
asserted during a control write transfer when the
processing has changed from the setup stage to the data
stage, and the ML60852 has detected EOP of the data
packet and has stored the data without error in the EP0
receive FIFO. The end of a packet is recognized when an
EOP has arrived in the cases of both full packets and short
packets.
An interrupt is generated at this time, if the EP0 receive
packet ready interrupt enable bit (D6 of INTENBL1) has
been asserted.
(EOP: End of packet)
In the case of EP0 reception, after the number of bytes of
the EP0 receive FIFO data indicated by the EP0 receive
byte count register (EP0RXCNT) has been read, write a “1”
to the EP0 receive packet ready bit (bit D0 of EP0STAT).
(This status is reset when a “1” is written in this bit.)
EP0 Receive packet ready
interrupt generation
End of EP0 receive
packet ready interrupt
Local MCU (firmware)
Note:
A short packet is a packet with a number of bytes less than the maximum packet size.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ML60852A | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:USB Device Controller |
| ML60852ATBZ010 | 功能描述:USB 接口集成電路 12 Mbps; USB Device Controller RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ML60852ATBZ03A | 制造商:ROHM Semiconductor 功能描述: |
| ML-60-V2/80721 | 制造商:Thomas & Betts 功能描述: |
| ML61 | 制造商:MINILOGIC 制造商全稱:MINILOGIC 功能描述:Series Positive Voltage Detector |
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