參數(shù)資料
型號(hào)： ML60852
廠商： OKI SEMICONDUCTOR CO., LTD.
英文描述： USB Device Controller
中文描述： USB設(shè)備控制器
文件頁(yè)數(shù)： 27/81頁(yè)
文件大小： 451K
代理商： ML60852
PEDL60852-01
1
Semiconductor
ML60852
27/81
(2) 2-Layer transmission operation (“O” indicates the assert condition and “x” indicates de-assert condition)
In the case of 1
→
2
→
3
→
4
→
5a
→
6
In the case of 1
→
2
→
3
→
4
→
5b
→
6
Layer A
64 bytes
Layer B
64 bytes
Layer A
PKT
RDY
Layer B
PKT
RDY
EPn
transmit
PKT
RDY
x
x
x
INTR
1
2
3
Layer A and layer B are both empty.
The local MCU starts writing into layer A.
Writing of one packet is completed.
The data of layer A is transmitted and
the next packet is written in layer B.
When layer A has become empty after
the writing in layer B is completed.
When the writing in layer B has been
completed after layer A has become
empty.
From 5a: Layer A has become empty.
From 5b: Layer B has become full.
Transmission of layer B is also started.
x
x
x
x
x
4
x
x
5a
x
5b
x
x
x
6
x
x
7
x
x
If the EPn transmit packet ready interrupt enable bit of INTENBL1 has been asserted, the transmit FIFO is empty,
and EPn transmit packet ready bit is de-asserted, the EPn transmit packet ready interrupt is asserted. This makes
it possible to write the transmit data into the EPn transmit FIFO.
When the data of one packet is written in layer A FIFO, make the local MCU set the transmit packet ready status
(bit D1 of EPnSTAT). By setting the transmit packet ready status, it becomes possible to transmit data to the
host. At this time, since layer B is still empty, the
INTR
pin maintains the asserted condition, thereby indicating
that the next packet data can be written. In this case, although bit D1 of EPnSTAT remains in the '0' condition,
the ML60852 recognizes that transmission is possible from layer A and starts transmission when an IN token is
received from the host.
It is possible for the local MCU to write the next packet of transmit data in the layer B FIFO while the data in
layer A is being transmitted over the USB bus.
When the writing of the data to be transmitted in layer B has been completed, the local MCU sets the transmit
packet ready bit, and the
INTR
pin becomes de-asserted at this time if the transmission of layer A data has not
been completed (that is, the ACK message is received from the host and the transmit packet ready bit is reset).
The local MCU cannot yet write the subsequent packet.)
If the layer A becomes empty before layer B goes into the transmit enable condition and transmission is carried
out normally, the ACK response is received from the host. The
INTR
pin remains asserted, and the local MCU
can write data into layer A FIFO after writing into layer B FIFO.
The transmission of data in layer A is continued from the state 4a, and when layer A becomes empty and the
transmission is completed normally, the ACK response is received from the host, whereupon the ML60852
asserts the
INTR
pin thereby prompting the local MCU to write data into layer A.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ML60852A 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:USB Device Controller
ML60852ATBZ010 功能描述:USB 接口集成電路 12 Mbps; USB Device Controller RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ML60852ATBZ03A 制造商:ROHM Semiconductor 功能描述:
ML-60-V2/80721 制造商:Thomas & Betts 功能描述:
ML61 制造商:MINILOGIC 制造商全稱:MINILOGIC 功能描述:Series Positive Voltage Detector
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