參數資料
型號: ML60852
廠商: OKI SEMICONDUCTOR CO., LTD.
英文描述: USB Device Controller
中文描述: USB設備控制器
文件頁數: 34/81頁
文件大?。?/td> 451K
代理商: ML60852
PEDL60852-01
1
Semiconductor
ML60852
34/81
FUNCTIONS OF REGISTERS
EP0 Transmit FIFO (EP0TXFIFO)
Address
Type
Access type
0 x 70
Byte data
Write only
D7
x
x
D6
x
x
D5
x
x
D4
x
x
D3
x
x
D2
x
x
D1
x
x
D0
x
x
After a hardware reset
After a bus reset
Definition
EP0 Transmit data
The EP0 transmit data can be written in by writing to the address 70h.
The transmit data to the host in the data stage during a control read transfer is stored in EP0TXFIFO. When the
ML60852 issues an EP0 transmit packet ready interrupt request, the local MCU writes the transmit data to the
address 70h.
It is possible to write the packet data successively by writing continuously.
The EP0TXFIFO is cleared under the following conditions.
1. When an ACK signal is received from the host for the data transmission from EP0
2. When a setup packet is received
EP0 Receive FIFO (EP0RXFIFO)
Address
Type
Access type
0 x 78
Byte data
Read only
D7
x
x
D6
x
x
D5
x
x
D4
x
x
D3
x
x
D2
x
x
D1
x
x
D0
x
x
After a hardware reset
After a bus reset
Definition
EP0 Receive data
The receive data from the host computer in the data sate during a control Write transfer is stored in EPORXFIFO.
The EPO receive data can be read out by the local MPU through reading the address 78h when the ML60852 issues
an EPO receive packet ready interrupt request. It is possible to read successively the data in the packet by reading
continuously.
The EP2RXFIFO is cleared under the following conditions:
1. When the local MPU resets the EPO receive packet ready bit.
2. When a setup packet is received.
3. When the local MCU writes a “0” in the stall bit.
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相關代理商/技術參數
參數描述
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