參數(shù)資料
型號(hào): ML60852
廠商: OKI SEMICONDUCTOR CO., LTD.
英文描述: USB Device Controller
中文描述: USB設(shè)備控制器
文件頁數(shù): 77/81頁
文件大?。?/td> 451K
代理商: ML60852
PEDL60852-01
1
Semiconductor
ML60852
77/81
DMA Transfer Timing (6)
Memory to ML60852 (Single Transfer, Dual Address Mode)
Parameter
Symbol
t
1
t
2
t
3
t
4
t
5
Condition
Load 20 pF
Min.
42
30
5
63
Max.
20
63
Unit
ns
ns
ns
ns
ns
ns
Note
DREQ
Disable Time
DREQ
Enable Time
FIFO Access Time
Write Data Setup Time
Write Data Hold Time
(4)
(1)
FIFO WRITE
8-bit DMA
(2)
Recovery Time
t
6
16-bit DMA
105
ns
(3)
Notes: (1) When in Dual Address mode, the DACK is ignored.
t
1
and t
3
are defined depending on
CS
or
WR
which becomes active last.
Refer to WRITE Timing (1) for Address Setup Time and Address Hold Time.
(2) 3-clock time of oscillation clock (clock period: 21 ns).
(3) 5-clock time of oscillation clock (clock period: 21 ns).
(4) It is possible to increase t
2
by setting the DMA interval register (DMAINTVL).
DREQ
DIN
CS
A7: A0
t
4
t
3
t
5
t
6
t
2
t
1
WR
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