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參數(shù)資料
| 型號： | MNSC140CORE |
| 廠商： | 飛思卡爾半導(dǎo)體(中國)有限公司 |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | Quad Core 16-Bit Digital Signal Processor |
| 中文描述： | 四核16位數(shù)字信號處理器 |
| 文件頁數(shù)： | 37/88頁 |
| 文件大?。?/td> | 983K |
| 代理商： | MNSC140CORE |
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Thermal Characteristics
MSC8122 Technical Data, Rev. 13
Freescale Semiconductor
2-3
2.3 Thermal Characteristics
Table 2-3
describes thermal characteristics of the MSC8122 for the FC-PBGA packages.
Section 4.5
,
Thermal Considerations
provides a detailed explanation of these characteristics.
2.4 DC Electrical Characteristics
This section describes the DC electrical characteristics for the MSC8122. The measurements in
Table 2-4
assume
the following system conditions:
T
A
= 25 °C
V
DD
=
— 300/400 MHz 1.1 V nominal = 1.07–1.13 V
DC
— 400 MHz 1.2 V nominal = 1.14–1.26 V
DC
— 500 MHz 1.2 V nominal = 1.16–1.24 V
DC
V
DDH
= 3.3 V ± 5% V
DC
GND
= 0 V
DC
Note:
The leakage current is measured for nominal
V
DDH
and
V
DD
.
Table 2-3.
Thermal Characteristics for the MSC8122
Characteristic
Symbol
FC-PBGA
20
×
20 mm
5
Unit
Natural
Convection
200 ft/min
(1 m/s) airflow
Junction-to-ambient
1, 2
Junction-to-ambient, four-layer board
1, 3
Junction-to-board (bottom)
4
Junction-to-case
5
Junction-to-package-top
6
R
θ
JA
R
θ
JA
R
θ
JB
R
θ
JC
Ψ
JT
26
21
°C/W
19
15
°C/W
9
°C/W
0.9
°C/W
1
°C/W
Notes:
1.
Junction temperature is a function of die size, on-chip power dissipation, package thermal resistance, mounting site (board)
temperature, ambient temperature, air flow, power dissipation of other components on the board, and board thermal
resistance.
Per SEMI G38-87 and JEDEC JESD51-2 with the single layer board horizontal.
Per JEDEC JESD51-6 with the board horizontal.
Thermal resistance between the die and the printed circuit board per JEDEC JESD 51-8. Board temperature is measured on
the top surface of the board near the package.
Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL SPEC-883 Method
1012.1).
Thermal characterization parameter indicating the temperature difference between package top and the junction temperature
per JEDEC JESD51-2.
2.
3.
4.
5.
6.
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