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參數(shù)資料
| 型號： | MNSC140CORE |
| 廠商： | 飛思卡爾半導(dǎo)體(中國)有限公司 |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | Quad Core 16-Bit Digital Signal Processor |
| 中文描述： | 四核16位數(shù)字信號處理器 |
| 文件頁數(shù)： | 38/88頁 |
| 文件大?。?/td> | 983K |
| 代理商： | MNSC140CORE |
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MSC8122 Technical Data, Rev. 13
2-4
Freescale Semiconductor
Specifications
2.5 AC Timings
The following sections include illustrations and tables of clock diagrams, signals, and parallel I/O outputs and
inputs. When systems such as DSP farms are developed using the DSI, use a device loading of 4 pF per pin. AC
timings are based on a 20 pF load, except where noted otherwise, and a 50
Ω
transmission line. For loads smaller
than 20 pF, subtract 0.06 ns per pF down to 10 pF load. For loads larger than 20 pF, add 0.06 ns for
SIU/Ethernet/DSI delay and 0.07 ns for GPIO/TDM/timer delay. When calculating overall loading, also consider
additional RC delay.
Table 2-4.
DC Electrical Characteristics
Characteristic
Symbol
Min
Typical
Max
Unit
Input high voltage
1
, all inputs except CLKIN
Input low voltage
1
V
IH
V
IL
V
IHC
V
ILC
I
IN
I
OZ
I
L
I
H
V
OH
2.0
—
3.465
V
GND
0
0.4
V
CLKIN input high voltage
2.4
3.0
3.465
V
CLKIN input low voltage
GND
0
0.4
V
Input leakage current, V
IN
= V
DDH
Tri-state (high impedance off state) leakage current, V
IN
= V
DDH
Signal low input current, V
IL
= 0.4 V
2
Signal high input current, V
IH
= 2.0 V
2
Output high voltage, I
OH
= –2 mA,
except open drain pins
–1.0
0.09
1
μA
–1.0
0.09
1
μA
–1.0
0.09
1
μA
–1.0
0.09
1
μA
2.0
3.0
—
V
Output low voltage, I
OL
= 3.2 mA
Internal supply current:
Wait mode
Stop mode
Typical power 400 MHz at 1.2 V
4
V
OL
—
0
0.4
V
I
DDW
I
DDS
P
—
—
375
3
290
3
—
—
mA
mA
—
1.15
—
W
Notes:
1.
2.
3.
4.
See
Figure 2-1
for undershoot and overshoot voltages.
Not tested. Guaranteed by design.
Measured for 1.2 V core at 25°C junction temperature.
The typical power values were measured using an EFR code with the device running at a junction temperature of 25°C. No
peripherals were enabled and the ICache was not enabled. The source code was optimized to use all the ALUs and AGUs and
all four cores. It was created using CodeWarrior
2.5. These values are provided as examples only. Power consumption is
application dependent and varies widely. To assure proper board design with regard to thermal dissipation and maintaining
proper operating temperatures, evaluate power consumption for your application and use the design guidelines in
Chapter 4
of
this document and in
MSC8102, MSC8122, and MSC8126 Thermal Management Design Guidelines
(AN2601).
Figure 2-1.
Overshoot/Undershoot Voltage for V
IH
and V
IL
GND
GND – 0.3 V
GND – 0.7 V
V
IL
V
IH
Must not exceed 10% of clock period
V
DDH
+ 17%
V
DDH
+ 8%
V
DDH
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