參數(shù)資料
型號(hào)： MSM7630
廠商： OKI SEMICONDUCTOR CO., LTD.
英文描述： Universal Speech Processor(通用語音處理器)
中文描述： 通用語音處理器（通用語音處理器）
文件頁數(shù)： 37/89頁
文件大小： 430K
代理商： MSM7630
MSM7630
Semiconductor
37/89
5.7 BPT: Breakpoint Trap
A breakpoint trap is generated when the instruction execution address matches the address pointed
to by the %BPA register. However, the EBP bit in the %PSR register must be enabled. The instruction
at the address that causes the trap will not be executed. The trap will be generated even if the
instruction is converted to a NOP by delayed instruction control (x-bit manipulation).
Type: Instruction-synchronous trap caused by hardware.
Vector number/address: Vector number = 8 / VBA+0x080
Conditions: EM == 1 && EBP == 1. Not invalidated by delayed instruction control (x-bit).
Saved address: Address pointed to by the %BPA register.
PL after interrupt transition: 15
5.8 EINT: External Interrupt 1-15
External interrupts are generated by inputs. However, an external interrupt will be accepted only
when its level has higher priority than the current processor level. When an external interrupt is
accepted, the processor level becomes the same as its level.
Type: Asynchronous interrupt when level on INT1-INT15 pins is detected.
Vector number/address: Vector number = 33-47 / VBA + 0x210-0x2f0
Conditions: EM == 1 && PL < external_interrupt_number
Saved address: Address being executed when the interrupt was accepted.
PL after interrupt transition: External interrupt number
The MSM7630 assigns interrupt levels as follows. It does not use other interrupts (including NMI).
Interrupt Source
User Block/TMR2
External pin (EXTINT)
Serial I/O
Parallel I/O
TMR1
Priority
1
2
3
4
5
Interrupt Number
INT11
INT9
INT7
INT5
INT3
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