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參數(shù)資料
| 型號： | MSM7630 |
| 廠商： | OKI SEMICONDUCTOR CO., LTD. |
| 英文描述： | Universal Speech Processor(通用語音處理器) |
| 中文描述： | 通用語音處理器（通用語音處理器） |
| 文件頁數(shù)： | 82/89頁 |
| 文件大?。?/td> | 430K |
| 代理商： | MSM7630 |
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MSM7630
Semiconductor
82/89
Speech Data Registers
1. Features
This is a register group and control circuit used for speech output.
2. Speech Data Registers Functions
2.1 Speech Output Registers
These are 12-bit registers that store speech output data. There are two registers and one output
register configured to operate at the speech sampling frequency.
Use of two registers reduces the frequency of interrupt generation during waveform output, which
lightens the CPU load. The output stage is provided in the register, which corrects the inaccuracies
in the sampling frequencies that are caused by interrupts.
The two registers are in parallel, continuously written with D/A conversion data. The output
register reads the data from the two registers alternately in every sampling cycle.
The output level registers' clock is generated by TMR2. This clock is multiplied by 1/2 to output
interrupt signals. The interrupt signals are used to write the waveform output data to the speech
output registers.
Note the following when the MSM7576 mode (described later) is not used when using the speech
output registers :
– The TMR2 must be set to the divided clock mode.
– To write data to DAC1 and DAC2, write to DA2 first, then DA1.
– Do not clear the status register of the TMR2. If it is cleared by an interrupt routine, the sampling
frequency for the speech output will change.
DATA
CLK
DATA
D
WR
Interrupt to
CPU
TMR2 output
12-bit REG
12-bit REG
1
1/2
12-bit REG
DAC
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