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參數(shù)資料
| 型號： | MSM7630 |
| 廠商： | OKI SEMICONDUCTOR CO., LTD. |
| 英文描述： | Universal Speech Processor(通用語音處理器) |
| 中文描述： | 通用語音處理器（通用語音處理器） |
| 文件頁數(shù)： | 56/89頁 |
| 文件大?。?/td> | 430K |
| 代理商： | MSM7630 |
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MSM7630
Semiconductor
56/89
2.3 Baud Rate
Internal baud rate generator
Clock synchronized transfers
B = f/(8
￥
n
￥
(256–P))
where
B : baud rate (bps)
f : processor (SCP) clock frequency (Hz)
n : baud rate parameter
One of 1, 2, 4, 8, 16, 32, and 64. Selected by SBR’s SBRP field.
(Refer to the register description.)
P : baud rate adjustment value (0
￡
P
￡
255)
Set by SBR’s SBRV field. (Refer to the register description.)
At a processor (SCP) clock of 20 MHz, the maximum transfer rate is 2.5 Mbps. At 40 MHz, the
maximum transfer rate is 5 Mbps.
Start-stop transfers
B = f/(16
￥
n
￥
(256–SBR))
where
B : baud rate (bps)
f : processor (SCP) clock frequency (Hz)
n : baud rate parameter
One of 1, 2, 4, 8, 16, 32, and 64. Selected by SBR’s SBRP field.
(Refer to the register description.)
SBR : baud rate adjustment value (0
￡
SBR
￡
255)
Set by SBR’s SBRV field. (Refer to the register description.)
2.4 Error Detection
Parity errors (start-stop transfers)
A parity error will be detected when a parity bit generated from received data does not match the
received parity bit.
Framing errors (start-stop transfers)
A framing error will be detected when a received stop bit is "0". When 2 stop bits have been selected,
only the first bit received will be checked.
Overrun errors (start-stop and clock synchronized transfers)
An overrun error will be detected when the next receive frame's stop bit is detected before the
receive buffer has been read.
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