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參數(shù)資料
| 型號(hào)： | MSM7630 |
| 廠商： | OKI SEMICONDUCTOR CO., LTD. |
| 英文描述： | Universal Speech Processor(通用語(yǔ)音處理器) |
| 中文描述： | 通用語(yǔ)音處理器（通用語(yǔ)音處理器） |
| 文件頁(yè)數(shù)： | 70/89頁(yè) |
| 文件大?。?/td> | 430K |
| 代理商： | MSM7630 |
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MSM7630
Semiconductor
70/89
Parallel Interface
1. Features
The parallel interface (PIO) inputs and outputs 8-bit wide parallel data. It has three data transfer
methods: software control mode where input/output is specified with 1-bit ports, handshake
control mode through strobe/acknowledge signals and flags indicating buffer status, and bus
control mode through read/write signals.
2. PIO Functions
2.1 PIO Data Size
8 bits
2.2 PIO Control Modes
Software control mode
In software control mode, the PIO controls input and output of bits in accordance with the value
written in the direction register. If a direction register bit is "0", then the corresponding pin level will
be an input. If "1", then the value in the corresponding output buffer will be output to the pin.
Handshake control mode
In handshake control mode, the PIO inputs external data through a handshake using a strobe signal
(
PSTB
) and input buffer full signal (PIBF). It outputs data externally through a handshake using an
output buffer full signal (POBF) and acknowledge signal (
PACK
).
Bus control mode
In bus control mode, the PIO controls data input/output with a chip select signal (
PCS
), flag/buffer
select signal (PIOA), read signal (
PACK
), and write signal (
PSTB
).
2.3 PIO Interrupts
Interrupts to the CPU core are available when handshake control mode or bus control mode is
selected.
Input buffer full interrupts
When PCMD’s PIEN bit is "1", writing "0" to the PIIE bit will disable input buffer full interrupts, and
writing "1" will enable them. When the PIEN bit is "0", input buffer full interrupts will be disabled
regardless of the value of the PIIE bit.
If input buffer full interrupts are enabled, then one will be generated whenever the input buffer is
written from an external device.
To release input buffer full interrupts, write "0" to the status register PSTS’s PIST bit, to the command
register PCMD’s PIIE bit, or to PCMD’s PIEN bit.
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