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參數(shù)資料
| 型號(hào)： | MSM7630 |
| 廠商： | OKI SEMICONDUCTOR CO., LTD. |
| 英文描述： | Universal Speech Processor(通用語(yǔ)音處理器) |
| 中文描述： | 通用語(yǔ)音處理器（通用語(yǔ)音處理器） |
| 文件頁(yè)數(shù)： | 38/89頁(yè) |
| 文件大小： | 430K |
| 代理商： | MSM7630 |
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MSM7630
Semiconductor
38/89
5.9 Return From Interrupt
In order to return from an interrupt process caused by an exception, external interrupt, or software
trap, the pipeline at the time of the interrupt must be regenerated before execution.
There are two types of returns: (1) re-execution of an instruction that was in its execution phase at
the time an exception, external interrupt, or asynchronous trap caused an interrupt, and (2) re-
execution of the instruction after the instruction that was in its execution phase at the time a software
trap caused an interrupt. However, if breakpoints are supported by software traps then case (1)
applies.
The return sequence from an interface process is described below.
Also, an rt instruction must not be executed while the EM bit of %PSR is 1 (the state permitting
overlapping interrupts). If an interrupt occurred during the rt instruction in such a case, then the
contents of %PSR would be corrupted.
1. Resume from interrupted instruction
·
·
brst
jlr
%psr, 4, %psr
%r1, %nop
; EM-bit reset
; delay slot, branch %r1 (old %PC),
; return address not saved
; return to %r2 (old %nPC), %prPSR move to %PSR
rt
%r2
2. Return from instruction after interrupt
·
·
add
brst
jlr
rt
%r2, 4, %r1
%psr, 4, %psr
%r2, %nop
%r1
; %r2+4 (old %nPC+4)
%r1
; EM-bit reset
; delay slot, branch %r2 (old %nPC), return address not saved
; return to %r1 (old %nPC+4), %prPSR move to %PSR
In this case the pNOP bit of %prPSR must be cleared in advance of rt instruction execution. If the
pNOP bit of %prPSR is set and then the rt instruction is executed, then the instruction at the return
point would not be executed.
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