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參數資料
| 型號： | MSM7630 |
| 廠商： | OKI SEMICONDUCTOR CO., LTD. |
| 英文描述： | Universal Speech Processor(通用語音處理器) |
| 中文描述： | 通用語音處理器（通用語音處理器） |
| 文件頁數： | 74/89頁 |
| 文件大?。?/td> | 430K |
| 代理商： | MSM7630 |
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MSM7630
Semiconductor
74/89
5. PIO Operation
5.1 Software Control Mode
In software control mode data input/output and control signals are all controlled by software.
5.1.1 Data Input from External Device
1) Write "1x" to the PCMD (Command Register) PMOD bits ("x" indicates that either "0" or "1" is
acceptable).
2) Read the input buffer PIB to read the parallel port’s pin levels at that time.
5.1.2 Data Output to External Device
1) Write "1x" to the PCMD (Command Register) PMOD bits ("x" indicates that either "0" or "1" is
acceptable).
2) Write a value to the output buffer POB.
3) Write "1" to the bits in PDIR (Direction Register) that correspond to parallel port pins that will be
outputs. This starts to drive the parallel port for data to be output.
4) If "0" is written to any bits in PDIR, then the corresponding parallel port pins will stop being
driven.
5.2 Handshake Control Mode
In handshake control mode data input is controlled by handshake using a strobe (
PSTB
), input buffer
full (PIBF), acknowledge (
PACK
), and output buffer full (POBF) for input/output.
5.2.1 Data Input from External Device
(A) SCP operation
1) Write "01" to the PCMD (Command Register) PMOD bits. Also write "1" to PCMD’s PIEN bit to
enable input operation.
2) When data is written to the input buffer PIB from the external device, the PSTS (Status Register)
PIST bit will become "1" to indicate that there is valid data in PIB. When PSTS’s PIST bit becomes
"1", the input buffer full output (PIBF) will become "1".
3) If PSTS’s PIST bit is "1" and input buffer full interrupts have been enabled (PCMD’s PIIE bit is "1"),
then a PIO interrupt to the CPU core will be generated.
4) The CPU core verifies that PSTS’s PIST bit is "1" in the PIO interrupt vector process routine and
reads the input buffer PIB. It then writes "0" to PSTS’s PIST bit to release the interrupt.
5) When PSTS’s PIST bit becomes "0", the input buffer full output (PIBF) also becomes "0".
6) Repeat the operation from step 2).
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