參數(shù)資料
型號(hào): MT90500
廠商: Mitel Networks Corporation
英文描述: Multi-Channel ATM AAL1 SAR
中文描述: 多通道自動(dòng)柜員機(jī)AAL1特區(qū)
文件頁(yè)數(shù): 150/159頁(yè)
文件大?。?/td> 514K
代理商: MT90500
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MT90500
150
External
Memory to
Internal
Memory
Control
Structure
Min: 512
Max: 8192
Control structure must start
on
512-byte
boundary:
x0 0000 0000
Register 6042h:
EIMCSBASE = bits<20:9> of
External to Internal Memory
Control Structure Base
Address.
Buffers must start on
boundary equal to
buffer
size
:
Control structures cannot
cross an
8192-byte (8K)
boundary
x0 0000 0000 0000
Therefore, to ensure that
structure never crosses this
boundary, start structure on
a boundary equal to the
structure size.
Structure size = # of
entries * 4 bytes/entry.
RX Circular
Buffers
Min: 64
Max: 1024
(one buffer
per received
TDM channel)
64 - x00 0000
128 - x000 0000
256 - x 0000 0000
512- x0 0000 0000
1024 - x00 0000 0000
Number of unique bits
provided differs in External to
Internal Memory Control
Structure:
64 bytes - bits<20:6>
128 bytes - bits<20:7>
256 bytes - bits<20:8>
512 bytes - bits<20:9>
1024 bytes - bits<20:10>
Each control structure must
start on a
16-byte
boundary:
Buffer size is controlled
by the External to
Internal Memory Control
Structure and the
RX_SAR Control
Structure.
RX_SAR
Control
Structures
Min: 14
Max: 256
(per VC)
x 0000
Register 4000h:
RXBASE = bits<20:18> of
RX_SAR Control Structure
Base Addresses.
Look-up Table entry provides
bits<17:4> of address.
FIFO must start on a
512-
byte
boundary:
Control structures cannot
cross a
256-byte
boundary
x 0000 0000
Transmit Data
Cell FIFO
Min: 1024
Max: 8192
x0 0000 0000
Register 2050h:
TXFFBASE = bits<20:9> of
Transmit Data Cell FIFO
Base Address.
FIFOs cannot cross an
8192-byte (8K)
boundary
x0 0000 0000 0000
Therefore, to ensure that
FIFO never crosses this
boundary, start FIFO on a
boundary equal to the
FIFO’s size.
Each non-CBR cell
occupies a 64-byte buffer
within the FIFO.
Min. Size = 16 cells * 64
bytes/cell.
Max. Size = 128 cells *
64 bytes/cell.
May be omitted.
Each non-CBR cell
occupies a 64-byte buffer
within the FIFO.
Receive
Data Cell
FIFO
Min: 1024
Max: 8192
FIFO must start on a
512-
byte
boundary:
x0 0000 0000
Register 4020h:
RXFFBASE = bits<20:9> of
Receive Data Cell FIFO Base
Address.
FIFOs cannot cross an
8192-byte (8K)
boundary
x0 0000 0000 0000
Therefore, to ensure that
FIFO never crosses this
boundary, start FIFO on a
boundary equal to the
FIFO’s size.
Min. Size = 16 cells * 64
bytes/cell.
Max. Size = 128 cells *
64 bytes/cell.
May be omitted.
Table 103 - Summary of External Memory Structures
External
Memory
Structure
SIze
(in bytes)
Start on Boundary
Do not cross boundary
Notes
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MT90500AL 制造商:MITEL 制造商全稱(chēng):Mitel Networks Corporation 功能描述:Multi-Channel ATM AAL1 SAR
MT90500AL-ENG1 制造商:Mitel Networks Corporation 功能描述:
MT90502 制造商:ZARLINK 制造商全稱(chēng):Zarlink Semiconductor Inc 功能描述:Multi-Channel AAL2 SAR
MT90502_06 制造商:ZARLINK 制造商全稱(chēng):Zarlink Semiconductor Inc 功能描述:Multi-Channel AAL2 SAR
MT90502AG 制造商:Rochester Electronics LLC 功能描述: 制造商:Zarlink Semiconductor Inc 功能描述: