參數(shù)資料
型號： MT90500
廠商： Mitel Networks Corporation
英文描述： Multi-Channel ATM AAL1 SAR
中文描述： 多通道自動柜員機AAL1特區(qū)
文件頁數(shù)： 80/159頁
文件大小： 514K
代理商： MT90500
MT90500
80
5.
Register Map
5.1
Register Overview
5.1.1
General
This section describes the registers contained within the MT90500. The MT90500 is mapped over 128 Kbytes
of address space, which is divided into two halves by the state of the AEM input pin. The division of the
addressing allows the user to access either the internal registers associated with the different internal blocks,
or to access the external SSRAM containing the circular buffers and associated control structures.
The first 64 Kbytes of address space are allocated for internal use, and are accessed by setting the AEM input
pin low. As shown in Table 11 on page 82, the MT90500 does not implement all of the 64 Kbytes available
inside the chip. The unused address space is reserved for future functionality.
The internal registers are used for control and status of:
Microprocessor Interface
TX_SAR
RX_SAR
UTOPIA module and interface
TDM Interface and clock recovery
TDM time slot control.
The second 64 Kbytes of address space are allocated as a window to external memory, accessed by setting
the AEM input pin high. This window is used by the CPU to access up to 2048 Kbytes of external SRAM. The
five latched address bits (EXTMADD[20:16] located at 0030h), provide access to 32 pages (each 64 Kbytes
long) of external memory.
All microprocessor accesses are 16-bit (word) accesses; byte access is not supported. Note that addresses
are however expressed as byte addresses. The least-significant-bit of the address bus is the A1 pin, sufficient
to distinguish between 16-bit words.
All register addresses and reset values are listed in hexadecimal (Hex) format.
The register types are:
Read / Write (R/W) - can be read or written via the microprocessor interface.
Read Only Latched (R/O/L) - these bits are set by an activated status point within the chip; once
set, they remain set even if the status point is deactivated. The microprocessor can read this point
and clear it by writing a logic ‘1’ into it. The register is cleared if the status point is not active. Writ-
ing logic ‘0’ has no effect on this register.
Read Only (R/O) - can be read via the microprocessor interface. A write to this register is ignored
by the chip.
Write Only (W/O) - certain bits associated with AAL5 operation which must be written high, but
which read back low.
相關(guān)PDF資料
PDF描述
MT90500AL Multi-Channel ATM AAL1 SAR
MT90502 Multi-Channel AAL2 SAR(多通道 ATM AAL2分段及重組設(shè)備（基于通訊總線的系統(tǒng)與ATM網(wǎng)絡(luò)的接口）)
MT90732AP Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
MT90732 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
MT90733 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MT90500AL 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:Multi-Channel ATM AAL1 SAR
MT90500AL-ENG1 制造商:Mitel Networks Corporation 功能描述:
MT90502 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Multi-Channel AAL2 SAR
MT90502_06 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Multi-Channel AAL2 SAR
MT90502AG 制造商:Rochester Electronics LLC 功能描述: 制造商:Zarlink Semiconductor Inc 功能描述:
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