- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄383644 > MT90500AL (Mitel Networks Corporation) Multi-Channel ATM AAL1 SAR PDF資料下載
參數(shù)資料
| 型號(hào)： | MT90500AL |
| 廠商： | Mitel Networks Corporation |
| 英文描述： | Multi-Channel ATM AAL1 SAR |
| 中文描述： | 多通道自動(dòng)柜員機(jī)AAL1特區(qū) |
| 文件頁(yè)數(shù)： | 108/159頁(yè) |
| 文件大?。?/td> | 514K |
| 代理商： | MT90500AL |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)當(dāng)前第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)第146頁(yè)第147頁(yè)第148頁(yè)第149頁(yè)第150頁(yè)第151頁(yè)第152頁(yè)第153頁(yè)第154頁(yè)第155頁(yè)第156頁(yè)第157頁(yè)第158頁(yè)第159頁(yè)
MT90500
108
Table 64 - Event Count Register
Address: 60A2 (Hex)
Label: EVCR
Reset Value: 0000 (Hex)
Label
Bit Position
Type
Description
Event_Cnt
15:0
R/O
This register keeps a running count of the reception of timing reference cells or 8 kHz
markers (as determined by setting of Cell / 8 kHz bit in register 60A0h). The contents of
this register are locked when a ‘1’ is written to the CNTUPDATE bit in the Clock Module
General Control Register (6080h). Thus CNTUPDATE should be set just prior to reading
this register. See Figure 31, “Adaptive Clock Recovery Sub-Module (Simplified Functional
Block Diagram),” on page 70 for more details.
Table 65 - CLKx1 Count - Low Register
Address: 60A4 (Hex)
Label: C1CRL
Reset Value: 0000 (Hex)
Label
Bit Position
Type
Description
CLKx1_Cnt_L
15:0
R/O
This register represents the low portion of a 24-bit counter which keeps a running count of
CLKx1 * 8 periods (i.e. every 8 cycles of CLKx1, a counter is incremented). The counter is
updated at the same time the Event Count Register (60A2h) is incremented. The contents
of this register are locked when a ‘1’ is written to the CNTUPDATE bit in the Clock Module
General Control Register (6080h). This should be done just prior to reading this register.
See Figure 31, “Adaptive Clock Recovery Sub-Module (Simplified Functional Block
Diagram),” on page 70 for more details.
Table 66 - CLKx1 Count - High Register
Address: 60A6 (Hex)
Label: C1CRH
Reset Value: 0000 (Hex)
Label
Bit Position
Type
Description
CLKx1_Cnt_H
7:0
R/O
This register represents the high portion of a 24-bit counter which keeps a running count of
CLKx1 * 8 periods (i.e. every 8 cycles of CLKx1, a counter is incremented). The counter is
updated at the same time the Event Count Register (60A2h) is incremented. The contents
of this register are locked when a ‘1’ is written to the CNTUPDATE bit in the Clock Module
General Control Register (6080h). This should be done just prior to reading this register.
See Figure 31, “Adaptive Clock Recovery Sub-Module (Simplified Functional Block
Diagram),” on page 70 for more details.
Reserved
15:8
R/O
Unused. Always read 00h.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MT90502 | Multi-Channel AAL2 SAR(多通道 ATM AAL2分段及重組設(shè)備（基于通訊總線的系統(tǒng)與ATM網(wǎng)絡(luò)的接口）) |
| MT90732AP | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| MT90732 | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| MT90733 | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| MT90733AP | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT90500AL-ENG1 | 制造商:Mitel Networks Corporation 功能描述: |
| MT90502 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Multi-Channel AAL2 SAR |
| MT90502_06 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Multi-Channel AAL2 SAR |
| MT90502AG | 制造商:Rochester Electronics LLC 功能描述: 制造商:Zarlink Semiconductor Inc 功能描述: |
| MT90503 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:2048VC AAL1 SAR |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。