- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄383644 > MT90500AL (Mitel Networks Corporation) Multi-Channel ATM AAL1 SAR PDF資料下載
參數(shù)資料
| 型號(hào)： | MT90500AL |
| 廠商： | Mitel Networks Corporation |
| 英文描述： | Multi-Channel ATM AAL1 SAR |
| 中文描述： | 多通道自動(dòng)柜員機(jī)AAL1特區(qū) |
| 文件頁(yè)數(shù)： | 42/159頁(yè) |
| 文件大?。?/td> | 514K |
| 代理商： | MT90500AL |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)當(dāng)前第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)第146頁(yè)第147頁(yè)第148頁(yè)第149頁(yè)第150頁(yè)第151頁(yè)第152頁(yè)第153頁(yè)第154頁(yè)第155頁(yè)第156頁(yè)第157頁(yè)第158頁(yè)第159頁(yè)
MT90500
42
4.3
TX_SAR Module
4.3.1
TX_SAR Overview
4.3.1.1
General
The TX_SAR block is responsible for performing CBR (Constant Bit Rate) cell assembly functions from the
TDM port towards the ATM Primary UTOPIA interface, which is typically connected to a PHY device. According
to a user-programmable timing algorithm, the TX_SAR circuit fetches data from the Transmit Circular Buffers
located in external memory and builds CBR ATM cells (AAL1, CBR-AAL0, or CBR-AAL5) which are
subsequently transferred to the MT90500 internal UTOPIA module and then to the Primary UTOPIA port. The
TX_SAR block has no direct interface to the pins of the MT90500, but ties together the TDM module and the
UTOPIA module. To construct CBR ATM cells, which must be periodically formed at the correct rate, an “event
scheduler” is used. To support different cell payload lengths and CBR AAL types, three programmable event
schedulers are provided by the TX_SAR to manage the cell transmission timing.
The TX_SAR provides enough bandwidth to allow the transmission of 1024 channels. The RX_SAR allows
reception of 1024 channels simultaneously. (For a total device capacity of 1024 bidirectional channels - all
2048 TDM time slots.)
The amount of external memory required to support the TX_SAR process depends on the number of TDM time
slots that need to be transmitted, as well as the number of simultaneous VCs. For example, the transmission of
1024 time slots over 1024 simultaneous VCs requires up to 100 Kbytes of external memory for the TX_SAR
process. Less memory is required if fewer VC connections or fewer TDM time slots are used.
4.3.1.2
Supported ATM Cell Formats
The AAL1 cell generation process supports TDM transport and trunking over standardized SDT (Structured
Data Transfer) with pointer bytes for up to n = 122 TDM channels; over pointerless Structured Data Transfer for
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
Even
Parity
Even
Parity
VCI
CLP
Cell with Pointer
46 Payload Bytes
Figure 12 - AAL1 ATM Cell Format
PTI
VCI
VPI
VCI
GFC / VPI
VPI
HEC
Sequence
Count
Pointer
CSI
CRC
field
Payload Byte #1
Payload Byte #2
Payload Byte #45
Payload Byte #46
VCI
CLP
Cell without Pointer
47 Payload Bytes
PTI
VCI
VPI
VCI
GFC / VPI
VPI
HEC
Sequence
Count
CSI
Payload Byte #1
Payload Byte #2
Payload Byte #46
Payload Byte #47
Payload Byte #3
CRC
field
Even
Parity
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MT90502 | Multi-Channel AAL2 SAR(多通道 ATM AAL2分段及重組設(shè)備（基于通訊總線的系統(tǒng)與ATM網(wǎng)絡(luò)的接口）) |
| MT90732AP | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| MT90732 | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| MT90733 | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| MT90733AP | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT90500AL-ENG1 | 制造商:Mitel Networks Corporation 功能描述: |
| MT90502 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Multi-Channel AAL2 SAR |
| MT90502_06 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Multi-Channel AAL2 SAR |
| MT90502AG | 制造商:Rochester Electronics LLC 功能描述: 制造商:Zarlink Semiconductor Inc 功能描述: |
| MT90503 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:2048VC AAL1 SAR |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。