參數(shù)資料
型號: PCI1520-EP
英文描述: Military Enhanced Plastic PC Card Controllers Data Manual
中文描述: 軍事增強塑料PC卡控制器數(shù)據(jù)手冊
文件頁數(shù): 105/125頁
文件大?。?/td> 716K
代理商: PCI1520-EP
5
18
5.16 ExCA Memory Windows 0
4 End-Address High-Byte Registers
These registers contain the high nibble of the 16-bit memory window end address for memory windows 0, 1, 2, 3,
and 4. The lower 4 bits of these registers correspond to bits A23
A20 of the end address. In addition, the memory
window wait states are set in this register. See Table 5
12 for a complete description of the register contents.
Bit
7
6
5
4
3
2
1
0
Name
ExCA memory windows 0
4 end-address high-byte
Type
RW
RW
R
R
RW
RW
RW
RW
Default
0
0
0
0
0
0
0
0
Register:
Offset:
ExCA memory window 0 end-address high-byte
CardBus socket address + 813h; Card A ExCA offset 13h
Card B ExCA offset 53h
Register:
Offset:
ExCA memory window 1 end-address high-byte
CardBus socket address + 81Bh; Card A ExCA offset 1Bh
Card B ExCA offset 5Bh
Register:
Offset:
ExCA memory window 2 end-address high-byte
CardBus socket address + 823h; Card A ExCA offset 23h
Card B ExCA offset 63h
Register:
Offset:
ExCA memory window 3 end-address high-byte
CardBus socket address + 82Bh; Card A ExCA offset 2Bh
Card B ExCA offset 6Bh
Register:
Offset:
ExCA memory window 4 end-address high-byte
CardBus socket address + 833h; Card A ExCA offset 33h
Card B ExCA offset 73h
Type:
Default:
Read-only, Read/Write
00h
Table 5
12. ExCA Memory Windows 0
4 End-Address High-Byte Registers Description
BIT
SIGNAL
TYPE
FUNCTION
7
6
MEMWS
RW
Wait state. Bits 7 and 6 specify the number of equivalent ISA wait states to be added to 16-bit memory
accesses. The number of wait states added is equal to the binary value of these two bits.
5
4
RSVD
R
Reserved. Bits 5 and 4 return 0s when read.
3
0
ENDHN
RW
End-address high nibble. Bits 3
0 represent the upper address bits A23
A20 of the memory window end
address.
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