參數(shù)資料
型號(hào): PCI1520-EP
英文描述: Military Enhanced Plastic PC Card Controllers Data Manual
中文描述: 軍事增強(qiáng)塑料PC卡控制器數(shù)據(jù)手冊(cè)
文件頁數(shù): 23/125頁
文件大?。?/td> 716K
代理商: PCI1520-EP
2
11
Table 2
9. Multifunction and Miscellaneous Terminals
TERMINAL
NAME
NO.
GHK
I/O
DESCRIPTION
MFUNC0
D19
I/O
Multifunction terminal 0. MFUNC0 can be configured as parallel PCI interrupt INTA, GPI0, GPO0, socket activity
LED output, ZV switching output, CardBus audio PWM, GPE, or a parallel IRQ. See Section 4.30,
Multifunction
Routing Register
, for configuration details.
MFUNC1
A16
I/O
Multifunction terminal 1. MFUNC1 can be configured as parallel PCI interrupt INTB, GPI1, GPO1, socket activity
LED output, ZV switching output, CardBus audio PWM, GPE, or a parallel IRQ. See Section 4.30,
Multifunction
Routing Register
, for configuration details.
Serial data (SDA). When LATCH is detected low after the deassertion of GRST, the MFUNC1 terminal provides
the SDA signaling for the serial bus interface. The two-terminal serial interface loads the subsystem identification
and other register defaults from an EEPROM after a PCI reset. See Section 3.6.1,
Serial Bus Interface
Implementation
, for details on other serial bus applications.
MFUNC2
E14
I/O
Multifunction terminal 2. MFUNC2 can be configured as GPI2, GPO2, socket activity LED output, ZV switching
output, CardBus audio PWM, GPE, RI_OUT, D3_STAT, or a parallel IRQ. See Section 4.30,
Multifunction
Routing Register
, for configuration details.
MFUNC3/
IRQSER
F13
I/O
Multifunction terminal 3. MFUNC3 can be configured as a parallel IRQ or the serialized interrupt signal IRQSER.
This terminal is IRQSER by default. See Section 4.30,
Multifunction Routing Register
, for configuration details.
MFUNC4
B15
I/O
Multifunction terminal 4. MFUNC4 can be configured as PCI LOCK, GPI3, GPO3, socket activity LED output,
ZV switching output, CardBus audio PWM, GPE, D3_STAT, RI_OUT, or a parallel IRQ. See Section 4.30,
Multifunction Routing Register
, for configuration details.
Serial clock (SCL). When LATCH is detected low after the deassertion of GRST, the MFUNC4 terminal provides
the SCL signaling for the serial bus interface. The two-terminal serial interface loads the subsystem identification
and other register defaults from an EEPROM after a PCI reset. See Section 3.6.1,
Serial Bus Interface
Implementation
, for details on other serial bus applications.
MFUNC5
A15
I/O
Multifunction terminal 5. MFUNC5 can be configured as GPI4, GPO4, socket activity LED output, ZV switching
output, CardBus audio PWM, D3_STAT, GPE, or a parallel IRQ. See Section 4.30,
Multifunction Routing
Register
, for configuration details.
MFUNC6/
CLKRUN
C14
I/O
Multifunction terminal 6. MFUNC6 can be configured as a PCI CLKRUN or a parallel IRQ. See Section 4.30,
Multifunction Routing Register
, for configuration details.
NC
E05
W11
No connect. These terminals have no connection anywhere within the package. Terminal E05 on the GHK
package is used as a key to indicate the location of the A1 corner of the BGA package. Terminals W11 on the
GHK package and 81 on the PDV package will be used as a 48-MHz clock input on future-generation devices.
RI_OUT/PME
E13
O
Ring indicate out and power management event output. This terminal provides an output for ring-indicate or PME
signals.
SPKROUT
F14
O
Speaker output. SPKROUT is the output to the host system that can carry SPKR or CAUDIO through the
PCI1520 from the PC Card interface. SPKROUT is driven as the exclusive-OR combination of card
SPKR//CAUDIO inputs.
SUSPEND
C15
I
Suspend. SUSPEND protects the internal registers from clearing when the GRST or PRST signal is asserted.
See Section 3.8.5,
Suspend Mode
, for details.
相關(guān)PDF資料
PDF描述
PCI1620GHK Controller Miscellaneous - Datasheet Reference
PCI1620PDV Controller Miscellaneous - Datasheet Reference
PCI2050A 32-Bit. 66MHz. 9-Master PCI-to-PCI Bridge
PCI2050GHK BUS CONTROLLER
PCI2050PDV BUS CONTROLLER
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