參數(shù)資料
型號： PCI1520-EP
英文描述： Military Enhanced Plastic PC Card Controllers Data Manual
中文描述： 軍事增強塑料PC卡控制器數(shù)據(jù)手冊
文件頁數(shù)： 72/125頁
文件大小： 716K
代理商： PCI1520-EP
4
–
19
4.30 Multifunction Routing Register
The multifunction routing register is used to configure the MFUNC0
–
MFUNC6 terminals. These terminals may be
configured for various functions. All multifunction terminals default to the general-purpose input configuration. This
register is intended to be programmed once at power-on initialization. The default value for this register can also be
loaded through a serial bus EEPROM. See Table 4
–
9 for a complete description of the register contents.
Bit
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Name
Multifunction routing
Type
R
R
R
R
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
Default
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Name
Multifunction routing
Type
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
Default
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
Register:
Offset:
Type:
Default:
Multifunction routing
8Ch (functions 0, 1)
Read-only, Read/Write
0000 1000h
Table 4
–
9. Multifunction Routing Register Description
BIT
SIGNAL
TYPE
FUNCTION
31
–
28
RSVD
R
Bits 31
–
28 return 0s when read.
27
–
24
MFUNC6
RW
Multifunction terminal 6 configuration. These bits control the internal signal mapped to the MFUNC6 terminal
as follows:
0000 = RSVD
0100 = IRQ4
1000 = IRQ8
0001 = CLKRUN
0101 = IRQ5
1001 = IRQ9
0010 = IRQ2
0110 = IRQ6
1010 = IRQ10
0011 = IRQ3
0111 = IRQ7
1011 = IRQ11
1100 = IRQ12
1101 = IRQ13
1110 = IRQ14
1111 = IRQ15
23
–
20
MFUNC5
RW
Multifunction terminal 5 configuration. These bits control the internal signal mapped to the MFUNC5 terminal
as follows:
0000 = GPI4
0100 = IRQ4
1000 = CAUDPWM
0001 = GPO4
0101 = IRQ5
1001 = D3_STAT
0010 = PCGNT
0110 = ZVSTAT
1010 = IRQ10
0011 = IRQ3
0111 = ZVSEL1
1011 = IRQ11
1100 = LEDA1
1101 = LED_SKT
1110 = GPE
1111 = IRQ15
19
–
16
MFUNC4
RW
Multifunction terminal 4 configuration. These bits control the internal signal mapped to the MFUNC4 terminal
as follows:
NOTE: When the serial bus mode is implemented by pulling down the LATCH terminal, the MFUNC4 terminal
provides the SCL signaling.
0000 = GPI3
0001 = GPO3
0010 = LOCK PCI
0011 = IRQ3
0100 = IRQ4
0101 = IRQ5
0110 = ZVSTAT
0111 = ZVSEL1
1000 = CAUDPWM
1001 = IRQ9
1010 = IRQ10
1011 = IRQ11
1100 = RI_OUT
1101 = LED_SKT
1110 = GPE
1111 = D3_STAT
15
–
12
MFUNC3
RW
Multifunction terminal 3 configuration. These bits control the internal signal mapped to the MFUNC3 terminal
as follows:
0000 = RSVD
0100 = IRQ4
1000 = IRQ8
0001 = IRQSER
0101 = IRQ5
1001 = IRQ9
0010 = IRQ2
0110 = IRQ6
1010 = IRQ10
0011 = IRQ3
0111 = IRQ7
1011 = IRQ11
1100 = IRQ12
1101 = IRQ13
1110 = IRQ14
1111 = IRQ15
11
–
8
MFUNC2
RW
Multifunction terminal 2 configuration. These bits control the internal signal mapped to the MFUNC2 terminal
as follows:
0000 = GPI2
0100 = IRQ4
1000 = CAUDPWM
0001 = GPO2
0101 = IRQ5
1001 = IRQ9
0010 = PCREQ
0110 = ZVSTAT
1010 = IRQ10
0011 = IRQ3
0111 = ZVSEL0
1011 = D3_STAT
1100 = RI_OUT
1101 = LEDA2
1110 = GPE
1111 = IRQ7
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