- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄369950 > PCI1520-EP Military Enhanced Plastic PC Card Controllers Data Manual PDF資料下載
參數(shù)資料
| 型號(hào)： | PCI1520-EP |
| 英文描述： | Military Enhanced Plastic PC Card Controllers Data Manual |
| 中文描述： | 軍事增強(qiáng)塑料PC卡控制器數(shù)據(jù)手冊(cè) |
| 文件頁數(shù)： | 63/125頁 |
| 文件大?。?/td> | 716K |
| 代理商： | PCI1520-EP |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁當(dāng)前第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁
4
–
10
4.18 CardBus Latency Timer Register
This register is programmed by the host system to specify the latency timer for the PCI1520 CardBus interface in units
of CCLK cycles. When the PCI1520 is a CardBus initiator and asserts CFRAME, the CardBus latency timer begins
counting. If the latency timer expires before the PCI1520 transaction has terminated, then the PCI1520 terminates
the transaction at the end of the next data phase. A recommended minimum value for this register is 40h, which allows
most transactions to be completed.
Bit
7
6
5
4
3
2
1
0
Name
CardBus latency timer
Type
RW
RW
RW
RW
RW
RW
RW
RW
Default
0
0
0
0
0
0
0
0
Register:
Offset:
Type:
Default:
CardBus latency timer
1Bh (functions 0, 1)
Read/Write
00h
4.19 Memory Base Registers 0, 1
The memory base registers indicate the lower address of a PCI memory address range. These registers are used
by the PCI1520 to determine when to forward a memory transaction to the CardBus bus and when to forward a
CardBus cycle to PCI. Bits 31
–
12 of these registers are read/write and allow the memory base to be located anywhere
in the 32-bit PCI memory space on 4-Kbyte boundaries. Bits 11
–
0 are read-only and always return 0s. Write
transactions to these bits have no effect. Bits 8 and 9 of the bridge control register specify whether memory windows
0 and 1 are prefetchable or nonprefetchable. The memory base register or the memory limit register must be nonzero
for the PCI1520 to claim any memory transactions through CardBus memory windows (that is, these windows are
not enabled by default to pass the first 4 Kbytes of memory to CardBus).
Bit
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Name
Memory base registers 0, 1
Type
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
Default
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Name
Memory base registers 0, 1
Type
RW
RW
RW
RW
R
R
R
R
R
R
R
R
R
R
R
R
Default
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Register:
Offset:
Type:
Default:
Memory base registers 0, 1
1Ch, 24h
Read-only, Read/Write
0000 0000h
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PCI1620GHK | Controller Miscellaneous - Datasheet Reference |
| PCI1620PDV | Controller Miscellaneous - Datasheet Reference |
| PCI2050A | 32-Bit. 66MHz. 9-Master PCI-to-PCI Bridge |
| PCI2050GHK | BUS CONTROLLER |
| PCI2050PDV | BUS CONTROLLER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PCI1520GHK | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI PC CARD CONTROLLER RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| PCI1520I | 制造商:TI 制造商全稱:Texas Instruments 功能描述:PC CARD CONTROLLERS |
| PCI1520IGHK | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI PC CARD CONTROLLER RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| PCI1520IGHKEP | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI Mil Enhance PC Card Cntrlr Data Manual RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| PCI1520IPDV | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI PC CARD CONTROLLER RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。