參數(shù)資料
型號: PCI1520-EP
英文描述: Military Enhanced Plastic PC Card Controllers Data Manual
中文描述: 軍事增強塑料PC卡控制器數(shù)據(jù)手冊
文件頁數(shù): 93/125頁
文件大小: 716K
代理商: PCI1520-EP
5
6
5.2
ExCA Interface Status Register
The ExCA interface status register provides information on the current status of the PC Card interface. An X in the
default bit value indicates that the value of the bit after reset depends on the state of the PC Card interface. See
Table 5
3 for a complete description of the register contents.
Bit
7
6
5
4
3
2
1
0
Name
ExCA interface status
Type
R
R
R
R
R
R
R
R
Default
0
0
X
X
X
X
X
X
Register:
Offset:
ExCA interface status
CardBus socket address + 801h; Card A ExCA offset 01h
Card B ExCA offset 41h
Type:
Default:
Read-only
00XX XXXXb
Table 5
3. ExCA Interface Status Register Description
BIT
SIGNAL
TYPE
FUNCTION
7
RSVD
R
Reserved. Bit 7 returns 0 when read.
6
CARDPWR
R
Card Power. Bit 6 indicates the current power status of the PC Card socket. This bit reflects how the ExCA
power control register (ExCA offset 02h/42h/802h, see Section 5.3) is programmed. Bit 6 is encoded as:
0 = VCC and VPP to the socket turned off (default)
1 = VCC and VPP to the socket turned on
Ready. Bit 5 indicates the current status of the READY signal at the PC Card interface.
0 = PC Card not ready for data transfer
1 = PC Card ready for data transfer
5
READY
R
4
CARDWP
R
Card write protect (WP). Bit 4 indicates the current status of WP at the PC Card interface. This signal reports
to the PCI1520 whether or not the memory card is write protected. Furthermore, write protection for an entire
PCI1520 16-bit memory window is available by setting the appropriate bit in the memory window
offset-address high-byte register.
0 = WP is 0. PC Card is read/write.
1 = WP is 1. PC Card is read-only.
3
CDETECT2
R
Card detect 2. Bit 3 indicates the status of CD2 at the PC Card interface. Software may use this and bit 2
(CDETECT1) to determine if a PC Card is fully seated in the socket.
0 = CD2 is 1. No PC Card is inserted.
1 = CD2 is 0. PC Card is at least partially inserted.
2
CDETECT1
R
Card detect 1. Bit 2 indicates the status of CD1 at the PC Card interface. Software may use this and bit 3
(CDETECT2) to determine if a PC Card is fully seated in the socket.
0 = CD1 is 1. No PC Card is inserted.
1 = CD1 is 0. PC Card is at least partially inserted.
1
0
BVDSTAT
R
Battery voltage detect. When a 16-bit memory card is inserted, the field indicates the status of the battery
voltage detect signals (BVD1, BVD2) at the PC Card interface, where bit 1 reflects the BVD2 status and bit 0
reflects BVD1.
00 = Battery dead
01 = Battery dead
10 = Battery low; warning
11 = Battery good
When a 16-bit I/O card is inserted, this field indicates the status of SPKR (bit 1) and STSCHG (bit 0) at the
PC Card interface. In this case, the two bits in this field directly reflect the current state of these card outputs.
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