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S/UNI-ATLAS-3200 Telecom Standard Product Data Sheet
Preliminary
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-1990553, Issue 4
403
Figure 32 RxPhy POS-PHY ATM Cell Transfer
1
2
3
4
5
6
7
8
9
10
0000
H1
D0
D11
.......
......
D1
D2
0
RPP_CLK
RPP_SX
RPP_SOP
RPP_EOP
RPP_ERR
RPP_ENB
RPP_DAT[31:0]
RPP_MOD[1:0]
RPP_PAR
RPP_VAL
Figure 32 is an example of 52-byte ATM cells being transferred over the POS-PHY interface.
The transfer is initiated with RPP_SX and the address insertion on the RPP_DAT bus. After 3
clocks, the link layer decides to pause the transfer by deasserting RPP_ENB. The S/UNI-
ATLAS-3200 discontinues the transfer immediately as shown, holding D2 on the RPP_DAT bus.
Unless paused by RPP_ENB, the S/UNI-ATLAS-3200 always transfers entire cells, ending with
an RPP_EOP. A new RPP_SX selection cycle will occur before another cell or packet is
transferred.. Cells and packets may be interleaved, but must be on separate PHYs.
14.1.2 Egress Packet Interface
When the S/UNI-ATLAS-3200 is required to carry a mix of cells and packets, a POS-PHY Level
3 interface is used. In the egress direction, the S/UNI-ATLAS-3200 provides a Tx PHY interface
on the input (system) side, and a Tx Link interface on the output (PHY) side. Selection of ingress
vs. egress mode and POS vs UL3 signaling must be performed at startup.
The POS-PHY egress transmit interface is controlled by the Link Layer device. Figure 33 is an
example of the TxLink block of S/UNI-ATLAS-3200 polling and transmitting to a multi-port
PHY device with several channels. The egress input interface (the TxPHY block) works exactly
the same way, except that the signals have a TPP (Transmit PHY POS) prefix, and the S/UNI-
ATLAS-3200 plays the role of the PHY rather than the Link Layer.