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參數(shù)資料
| 型號： | QSMRM |
| 英文描述： | QSMRM QSM Queued Serial Module Reference Manual |
| 中文描述： | QSMRM QSM排隊串行模塊參考手冊 |
| 文件頁數(shù)： | 100/112頁 |
| 文件大?。?/td> | 1496K |
| 代理商： | QSMRM |
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MOTOROLA
-4
QSM
REFERENCE MANUAL
PT — Parity Type
1 = Odd parity
0 = Even parity
PE — Parity Enable
1 = SCI parity enabled
0 = SCI parity disabled
M — Mode Select
1 = SCI frame: one start bit, nine data bits, one stop bit (eleven bits total)
0 = SCI frame: one start bit, eight data bits, one stop bit (ten bits total)
WAKE — Wakeup by Address Mark
1 = SCI receiver awakened by address mark (eighth or ninth (last) bit set)
0 = SCI receiver awakened by idle-line detection
TIE — Transmit Interrupt Enable
1 = SCI TDRE interrupts enabled
0 = SCI TDRE interrupts inhibited
TCIE — Transmit Complete Interrupt Enable
1 = SCI TC interrupts enabled
0 = SCI TC interrupts inhibited
RIE — Receiver Interrupt Enable
1 = SCI RDRF interrupts enabled
0 = SCI RDRF interrupts inhibited
ILIE — Idle-Line Interrupt Enable
1 = SCI IDLE interrupts enabled
0 = SCI IDLE interrupts inhibited
TE — Transmitter Enable
1 = SCI transmitter enabled; TXD pin dedicated to the SCI transmitter
0 = SCI transmitter disabled; TXD pin can be used as general-purpose I/O
RE — Receiver Enable
1 = SCI receiver enabled
0 = SCI receiver disabled
RWU — Receiver Wakeup
1 = Wakeup mode enabled, all received data ignored until awakened
0 = Normal receiver operation, all received data recognized
M
0
0
1
1
PE
0
1
0
1
Result
8 Data Bits
7 Data Bits, 1 Parity Bit
9 Data Bits
8 Data Bits, 1 Parity Bit
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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