參數(shù)資料
型號: QSMRM
英文描述: QSMRM QSM Queued Serial Module Reference Manual
中文描述: QSMRM QSM排隊串行模塊參考手冊
文件頁數(shù): 107/112頁
文件大?。?/td> 1496K
代理商: QSMRM
QSM
REFERENCE MANUAL
MOTOROLA
-11
*The PCS0 bit represents the dual-function PCS0/SS.
CONT — Continue
1 = Keeps peripheral chip-selects asserted after transfer is complete.
0 = Returns control of peripheral chip-selects to QPDR after transfer is complete.
BITSE — Bits Enable
1 = Number of bits to transfer defined in BITS field of SPCR0.
0 = Eight bits to transfer
DT — Delay After Transfer
1 = Delay
0 = No delay
DSCK — PCS to SCK Delay
1 = DSCKL field in SPCR1 specifies value of delay from PCS valid to SCK
0 = PCS valid to SCK transition is 1/2 SCK
PCS[3:0]/SS — Peripheral Chip-Select
The four peripheral chip-select bits can be used directly to select one of four external
chips for the serial transfer, or decoded by external hardware to select one of 16 chip-
select patterns for a serial transfer.
COMMAND RAM
7
CONT
$YFFD40
0
PCS0*
6
5
4
3
2
1
BITSE
DT
DSCK
PCS3
PCS2
PCS1
CONT
BITSE
DT
DSCK
PCS3
PCS2
PCS1
PCS0*
$YFFD4F
COMMAND CONTROL
PERIPHERAL CHIP-SELECT
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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