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參數(shù)資料
| 型號： | SAA6750 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Encoder for MPEG2 image recording EMPIRE |
| 中文描述： | 為MPEG2編碼器帝國的形象記錄 |
| 文件頁數(shù)： | 16/60頁 |
| 文件大小： | 217K |
| 代理商： | SAA6750 |
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2000 May 03
16
Philips Semiconductors
Product specification
Encoder for MPEG2 image recording
(EMPIRE)
SAA6750H
Table 2
Behaviour of output and I/O pins
Note
1.
Only defined if external clock is available.
PIN NAME
DESCRIPTION
PIN STATUS
RESET MODE
INIT MODE AND
INTERNAL RESET
SOFT RESET
MODE
DATA0 to DATA63
ADR0 to ADR8
CASN
RASN
WEN
OEN
SDA
SCL
MEM_ST
FAD_RDYN
DRAM data input/output
DRAM address output
DRAM column address strobe output 3-state
DRAM row address strobe output
DRAM write enable output
DRAM chip select output
I
2
C-bus data input/open-drain output
I
2
C-bus clock input/output
reserved output
ASIP data port; data ready output
input
3-state
input
output
output
output
output
output
normal operating
normal operating
output
open-drain
input
3-state
3-state
3-state
3-state
3-state
normal operating
normal operating
3-state
open-drain
3-state
3-state
3-state
input
input
3-state
open-drain;
note 1
input
open-drain
GPIO0 to GPIO11 ASIP data port; input/output
LRQN
output port lower watermark interrupt
request
URQN
output port upper watermark interrupt
request
DTACK_RDY
output port data transfer
acknowledge/ready/request
AD0 to AD15
output port address/data input/output input
input
on
input
open-drain
open-drain
on
open-drain
open-drain
on
open-drain
input
input
7.3
Video front-end and formatter
7.3.1
G
ENERAL
The video front-end and formatter module consists of an
8-bit data input interface, a formatter sub-module and
a luminance and a chrominance address processing unit.
The interface is designed for use with Philips SAA7111
video decoder family or similar products. The input
interface accepts a digital video input stream according to
“ITU-T 601” PAL standard at 50 Hz and 720 pixels by
576 lines as well as NTSC at 60 Hz and 720 pixels by
480 lines are covered. The video synchronization may
either follow “ITU-T 656”recommendation or can also be
supplied by external signals (HSYNC, VSYNC and FID).
The formatter module performs a colour conversion from
4 : 2 : 2 to 4 : 2 : 0 format. Optionally, also an SIF
down-scaling may be activated for PAL as well as NTSC
standard signals. The luminance and chrominance
processing units do generate the addresses for storing the
front-end output data in the external DRAM memory.
7.3.2
D
ATA INPUT FORMAT
The 8-bit video input data has to be transferred at a rate of
27 Mwords/s (13.5 MHz for luminance and 6.25 MHz for
both chrominance components) i.e. one data word per
clock cycle has to be sent. The elements of a data stream
have the following order: C
B
, Y, C
R
, Y, C
B
, Y, C
R
, Y, etc.
The byte combinations 00H and FFH are reserved for
synchronization purposes, so that only a subset of 254 of
all possible 2
8
= 256 combinations are used.
See Section 7.3.3 for detailed information about the
synchronization signals.
The external reference clock VCLK has to be
synchronized to the video input data.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SAA6750H | Encoder for MPEG2 image recording EMPIRE |
| SAA6752HS | MPEG-2 video and MPEG-audio/AC-3 audio encoder with multiplexer |
| SAA7102 | Circular Connector; MIL SPEC:MIL-C-5015; Body Material:Metal; Series:GT; No. of Contacts:12; Connector Shell Size:28; Connecting Termination:Solder; Circular Shell Style:Straight Plug; Body Style:Straight |
| SAA7102E | Digital video encoder |
| SAA7102H | Digital video encoder |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SAA6750H | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Encoder for MPEG2 image recording EMPIRE |
| SAA6752HS | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:MPEG-2 video and MPEG-audio/AC-3 audio encoder with multiplexer |
| SAA6752HS/V103 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:MPEG-2 video and MPEG-audio/AC-3 audio encoder with multiplexer |
| SAA6752HS/V103,557 | 功能描述:IC AUD/VID ENCODER MPEG 208-SQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編碼器，解碼器，轉(zhuǎn)換器 系列:- 產(chǎn)品變化通告:Development Systems Discontinuation 26/Apr/2011 標(biāo)準(zhǔn)包裝:1 系列:- 類型:編碼器 應(yīng)用:DVB-S.2 系統(tǒng) 電壓 - 電源，模擬:- 電壓 - 電源，數(shù)字:- 安裝類型:- 封裝/外殼:模塊 供應(yīng)商設(shè)備封裝:模塊 包裝:散裝 其它名稱:Q4645799 |
| SAA6752HS/V104 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:MPEG-2 video and MPEG-audio/AC-3 audio encoder with multiplexer |
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