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參數(shù)資料
| 型號： | SAA6750 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Encoder for MPEG2 image recording EMPIRE |
| 中文描述： | 為MPEG2編碼器帝國的形象記錄 |
| 文件頁數(shù)： | 38/60頁 |
| 文件大?。?/td> | 217K |
| 代理商： | SAA6750 |
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2000 May 03
38
Philips Semiconductors
Product specification
Encoder for MPEG2 image recording
(EMPIRE)
SAA6750H
Table 22
Description of the I
2
C-bus control bits and words
BIT
ADDRESS
(HEX)
BIT
NAME
CONTROL WORD
NAME
DATA
BYTE
DESCRIPTION
00
01
BYP
SMOD
(1)
19
internal use; it must be set to LOW during initialization
external/internal sync signal selection;
LOW: sync is derived from the SAV and EAV information
decoded from the data stream at port YUV;
HIGH: sync is derived from the external sync signals at
pins FID, HSYNC and VSYNC
engine stop; see Table 23
engine start; see Table 23
data output port address mode selection;
LOW: external address decoding (CSN pin);
HIGH: internal address decoding (AD pin)
maximum output bit-rate selection; use default setting given in
the software specification
non SIF mode/SIF mode selection; LOW: subsampling off;
HIGH: subsampling on (SIF mode convertion active)
NTSC/PAL selection; LOW: NTSC mode input signal
expected; HIGH: PAL mode input signal expected
use default setting given in the software specification
02
03
04
E_SP
E_ST
BUS
05
INTRA
06
SS
(1)
07
STD
(1)
08 to 0F
PMI0 to
PMI7
WR0 to
WR7
RD0 to
RD7
BUF0 to
BUF7
RFR0 to
RFR7
MC0 to
MC7
ML0 to
ML7
VSB0 to
VSB6
FIDP
(1)
18
10 to 17
17
use default setting given in the software specification
18 to 1F
16
use default setting given in the software specification
20 to 27
15
use default setting given in the software specification
28 to 2F
14
use default setting given in the software specification
30 to 37
13
use default setting given in the software specification
38 to 3F
12
use default setting given in the software specification
40 to 46
vertical shift bottom
field
11
value determines number of H-syncs occurring after V-sync
before the bottom field line based processing starts; note 2
FID signal polarity selection; LOW: FID signal not inverted
(FID = LOW indicates odd field); HIGH: FID signal inverted
(FID = HIGH indicates odd field); this setting takes affect for
external as well as for SAV and EAV sync
47
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SAA6750H | Encoder for MPEG2 image recording EMPIRE |
| SAA6752HS | MPEG-2 video and MPEG-audio/AC-3 audio encoder with multiplexer |
| SAA7102 | Circular Connector; MIL SPEC:MIL-C-5015; Body Material:Metal; Series:GT; No. of Contacts:12; Connector Shell Size:28; Connecting Termination:Solder; Circular Shell Style:Straight Plug; Body Style:Straight |
| SAA7102E | Digital video encoder |
| SAA7102H | Digital video encoder |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SAA6750H | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Encoder for MPEG2 image recording EMPIRE |
| SAA6752HS | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:MPEG-2 video and MPEG-audio/AC-3 audio encoder with multiplexer |
| SAA6752HS/V103 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:MPEG-2 video and MPEG-audio/AC-3 audio encoder with multiplexer |
| SAA6752HS/V103,557 | 功能描述:IC AUD/VID ENCODER MPEG 208-SQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編碼器，解碼器，轉(zhuǎn)換器 系列:- 產(chǎn)品變化通告:Development Systems Discontinuation 26/Apr/2011 標(biāo)準(zhǔn)包裝:1 系列:- 類型:編碼器 應(yīng)用:DVB-S.2 系統(tǒng) 電壓 - 電源，模擬:- 電壓 - 電源，數(shù)字:- 安裝類型:- 封裝/外殼:模塊 供應(yīng)商設(shè)備封裝:模塊 包裝:散裝 其它名稱:Q4645799 |
| SAA6752HS/V104 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:MPEG-2 video and MPEG-audio/AC-3 audio encoder with multiplexer |
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