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參數(shù)資料
| 型號： | SAA6750 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Encoder for MPEG2 image recording EMPIRE |
| 中文描述： | 為MPEG2編碼器帝國的形象記錄 |
| 文件頁數(shù)： | 27/60頁 |
| 文件大?。?/td> | 217K |
| 代理商： | SAA6750 |
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2000 May 03
27
Philips Semiconductors
Product specification
Encoder for MPEG2 image recording
(EMPIRE)
SAA6750H
7.4.2.4
Intra/inter coded macroblock selection in
P frames
The selection of intra or inter coded macroblock
compression mode depends on a control byte from the
ASIP or on the MAD value. A macroblock is coded intra, if
the ASIP demands so or when the MAD resulting from the
motion estimation is above a threshold value. This
threshold value is provided by the ASIP. The resulting
encoding mode is returned to the ASIP.
7.4.2.5
Field/frame DCT coded macroblock selection
for luminance blocks
Depending on motion between the two fields comprising a
frame, the four 8
×
8 pixel DCT luminance blocks of a
macroblock are differently derived from the 16
×
16 pixels.
The luminance pixels of a macroblock are vertically
Walsh-Hadamard transformed in order to detect the field
motion. If the first coefficient is higher than a threshold
value, then the DCT is performed field-wise. The ASIP can
force frame DCT coding. The result, i.e. frame or field DCT
coding, is returned to the ASIP. The output of the DCT are
four luminance and two chrominance blocks consisting of
8
×
8 pixels each.
7.4.2.6
Quantization
The quantization performs the redundancy removal,
depending on settings provided by the ASIP.
The quantization may be customized by using a dedicated
quantization table which can be loaded via the I
2
C-bus
(see Section 7.9.4). The quantization table data is part of
the software packages and will be described in the
software specification.
7.4.2.7
Trend removal
DC coefficients are coded differentially. However, at the
start of every slice and for every intra coded macroblock,
the absolute values are coded. Therefore, the ASIP sends
a control word to the MBP indicating the start of a slice.
7.4.2.8
Run-length coding and variable-length coding
The MBP compresses the quantized DCT coefficients by
(zero) Run-Length Coding (RLC) and Variable-Length
Coding (VLC). To inform the ASIP about the achieved
compression, it sends the number of bits used in the
bitstream to the ASIP. The maximum number of bits used
for each of the six blocks (see Section 7.4.2.5) must be set
by the ASIP. Furthermore, the coded block pattern is sent
to the ASIP.
7.4.2.9
Addressing
The MBP only relies on the format used to store
macroblocksintheexternalDRAM.Itworksindependently
from the memory map where to find which macroblock.
The ASIP has to keep track of the macroblocks base
addresses and has to inform the MBP where to find the
data. The MBP only increments the addresses to fetch
next data or to write results back.
7.4.2.10
Communication with the ASIP
The communication with the ASIP is the same for every
macroblock. That means that although many settings
remain unchanged they have to be repeatedly sent from
the ASIP to the MBP. The communication is handled by
FIFOs.
7.5
Bitstream assembly
7.5.1
G
ENERAL
While MBP only processes the incoming video data and
the ASIP generates the corresponding MPEG2 compliant
header and stuffing information, these informationmust be
gathered to form a complete output stream.
Parts involved are:
Packing unit (packer and pre-packer)
Stuffing unit (Buffer_out_address and Buffer_out_data)
Various FIFOs connecting all parts together.
The packing unit does the bit-wise processing of the ASIP
and MBP generated streams while the stuffing unit is byte
oriented. Handshaking of all blocks is done via FIFOs.
7.5.2
P
RE
-
PACKER AND PACKER
The packing unit (consisting of packer and pre-packer) is
responsible to compose a fluent bitstream. Each clock
cycle the packer gets a certain amount of valid bits
(0 to 24) as input data either from the ASIP (e.g. header
information) or from the MBP (compressed macroblock
coefficients via pre-packer) and generates 64-bit words
with valid bits only. These words are stored into the 4 Mbit
output buffer located in the external DRAM.
To reduce the memory needs of the compressed
macroblock data, a pre-packing to get words of 24 valid
bits is performed before storing data for packing.
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| SAA6750H | Encoder for MPEG2 image recording EMPIRE |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SAA6750H | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Encoder for MPEG2 image recording EMPIRE |
| SAA6752HS | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:MPEG-2 video and MPEG-audio/AC-3 audio encoder with multiplexer |
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| SAA6752HS/V104 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:MPEG-2 video and MPEG-audio/AC-3 audio encoder with multiplexer |
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