參數(shù)資料
型號： SM320F28335GHHAEP
廠商： Texas Instruments
文件頁數(shù)： 100/167頁
文件大小： 0K
描述： IC DIGITAL SIGNAL CTLR 179-BGA
產(chǎn)品培訓(xùn)模塊： ControlSUITE
Motor Signal Chain Overview
TPS75005 Single IC Power for C2000 MCU
標(biāo)準(zhǔn)包裝： 189
系列： TMS320F28x3x Delfino™, C2000™
核心處理器： C28x
芯體尺寸： 32-位
速度： 150MHz
連通性： CAN，EBI/EMI，I²C，McBSP，SCI，SPI，UART/USART
外圍設(shè)備： DMA，POR，PWM，WDT
輸入/輸出數(shù)： 88
程序存儲器容量： 512KB（256K x 16）
程序存儲器類型： 閃存
RAM 容量： 34K x 16
電壓 - 電源 (Vcc/Vdd)： 1.805 V ~ 1.995 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 16x12b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 179-LFBGA
包裝： 托盤
產(chǎn)品目錄頁面： 718 (CN2011-ZH PDF)
其它名稱： 296-25243
SPRS581D – JUNE 2009 – REVISED MAY 2012
3.2.9
Boot ROM
The Boot ROM is factory-programmed with boot-loading software. Boot-mode signals are provided to tell
the bootloader software what boot mode to use on power up. The user can select to boot normally or to
download new software from an external connection or to select boot software that is programmed in the
internal Flash/ROM. The Boot ROM also contains standard tables, such as SIN/COS waveforms, for use
in math related algorithms.
Table 3-4. Boot Mode Selection
MODE
GPIO87/XA15
GPIO86/XA14
GPIO85/XA13
GPIO84/XA12
MODE(1)
F
1
Jump to Flash
E
1
0
SCI-A boot
D
1
0
1
SPI-A boot
C
1
0
I2C-A boot
B
1
0
1
eCAN-A boot
A
1
0
1
0
McBSP-A boot
9
1
0
1
Jump to XINTF x16
8
1
0
Jump to XINTF x32
7
0
1
Jump to OTP
6
0
1
0
Parallel GPIO I/O boot
5
0
1
0
1
Parallel XINTF boot
4
0
1
0
Jump to SARAM
3
0
1
Branch to check boot mode
2
0
1
0
Branch to Flash, skip ADC calibration
1
0
1
Branch to SARAM, skip ADC
calibration
0
Branch to SCI, skip ADC calibration
(1)
All four GPIO pins have an internal pullup.
NOTE
Modes 0, 1, and 2 in Table 3-4 are for TI debug only. Skipping the ADC calibration function
in an application will cause the ADC to operate outside of the stated specifications
3.2.10 Security
The devices support high levels of security to protect the user firmware from being reverse engineered.
The security features a 128-bit password (hardcoded for 16 wait-states), which the user programs into the
flash. One code security module (CSM) is used to protect the flash/OTP and the L0/L1/L2/L3 SARAM
blocks. The security feature prevents unauthorized users from examining the memory contents via the
JTAG port, executing code from external memory or trying to boot-load some undesirable software that
would export the secure memory contents. To enable access to the secure blocks, the user must write the
correct 128-bit KEY value, which matches the value stored in the password locations within the Flash.
In addition to the CSM, the emulation code security logic (ECSL) has been implemented to prevent
unauthorized users from stepping through secure code. Any code or data access to flash, user OTP, L0,
L1, L2 or L3 memory while the emulator is connected will trip the ECSL and break the emulation
connection. To allow emulation of secure code, while maintaining the CSM protection against secure
memory reads, the user must write the correct value into the lower 64 bits of the KEY register, which
matches the value stored in the lower 64 bits of the password locations within the flash. Note that dummy
reads of all 128 bits of the password in the flash must still be performed. If the lower 64 bits of the
password locations are all ones (unprogrammed), then the KEY value does not need to match.
38
Functional Overview
Copyright 2009–2012, Texas Instruments Incorporated
Product Folder Link(s): SM320F28335-EP
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