參數(shù)資料
型號: SM320F28335GHHAEP
廠商: Texas Instruments
文件頁數(shù): 26/167頁
文件大?。?/td> 0K
描述: IC DIGITAL SIGNAL CTLR 179-BGA
產(chǎn)品培訓(xùn)模塊: ControlSUITE
Motor Signal Chain Overview
TPS75005 Single IC Power for C2000 MCU
標(biāo)準(zhǔn)包裝: 189
系列: TMS320F28x3x Delfino™, C2000™
核心處理器: C28x
芯體尺寸: 32-位
速度: 150MHz
連通性: CAN,EBI/EMI,I²C,McBSP,SCI,SPI,UART/USART
外圍設(shè)備: DMA,POR,PWM,WDT
輸入/輸出數(shù): 88
程序存儲器容量: 512KB(256K x 16)
程序存儲器類型: 閃存
RAM 容量: 34K x 16
電壓 - 電源 (Vcc/Vdd): 1.805 V ~ 1.995 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 16x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 179-LFBGA
包裝: 托盤
產(chǎn)品目錄頁面: 718 (CN2011-ZH PDF)
其它名稱: 296-25243
SPRS581D – JUNE 2009 – REVISED MAY 2012
Table 6-22 shows the high-resolution PWM switching characteristics.
Table 6-22. High Resolution PWM Characteristics at SYSCLKOUT = (60 - 150 MHz)
MIN
TYP
MAX
UNIT
Micro Edge Positioning (MEP) step size(1)
150
310
ps
(1)
Maximum MEP step size is based on worst-case process, maximum temperature and maximum voltage. MEP step size will increase
with low voltage and high temperature and decrease with voltage and cold temperature.
Applications that use the HRPWM feature should use MEP Scale Factor Optimizer (SFO) estimation software functions. See the TI
software libraries for details of using SFO function in end applications. SFO functions help to estimate the number of MEP steps per
SYSCLKOUT period dynamically while the HRPWM is in operation.
Table 6-23 shows the eCAP timing requirement and Table 6-24 shows the eCAP switching characteristics.
Table 6-23. Enhanced Capture (eCAP) Timing Requirement(1)
TEST CONDITIONS
MIN
MAX
UNIT
tw(CAP)
Capture input pulse width
Asynchronous
2tc(SCO)
cycles
Synchronous
2tc(SCO)
cycles
With input qualifier
1tc(SCO) + tw(IQSW)
cycles
(1)
For an explanation of the input qualifier parameters, see Table 6-12.
Table 6-24. eCAP Switching Characteristics
PARAMETER
TEST CONDITIONS
MIN
MAX
UNIT
tw(APWM)
Pulse duration, APWMx output high/low
20
ns
Table 6-25 shows the eQEP timing requirement and Table 6-26 shows the eQEP switching
characteristics.
Table 6-25. Enhanced Quadrature Encoder Pulse (eQEP) Timing Requirements(1)
TEST CONDITIONS
MIN
MAX
UNIT
tw(QEPP)
QEP input period
Asynchronous/synchronous
2tc(SCO)
cycles
With input qualifier
2(1tc(SCO) + tw(IQSW))
cycles
tw(INDEXH)
QEP Index Input High time
Asynchronous/synchronous
2tc(SCO)
cycles
With input qualifier
2tc(SCO) +tw(IQSW)
cycles
tw(INDEXL)
QEP Index Input Low time
Asynchronous/synchronous
2tc(SCO)
cycles
With input qualifier
2tc(SCO) + tw(IQSW)
cycles
tw(STROBH)
QEP Strobe High time
Asynchronous/synchronous
2tc(SCO)
cycles
With input qualifier
2tc(SCO) + tw(IQSW)
cycles
tw(STROBL)
QEP Strobe Input Low time
Asynchronous/synchronous
2tc(SCO)
cycles
With input qualifier
2tc(SCO) +tw(IQSW)
cycles
(1)
For an explanation of the input qualifier parameters, see Table 6-12.
Table 6-26. eQEP Switching Characteristics
PARAMETER
TEST CONDITIONS
MIN
MAX
UNIT
td(CNTR)xin
Delay time, external clock to counter increment
4tc(SCO)
cycles
td(PCS-OUT)QEP
Delay time, QEP input edge to position compare sync
6tc(SCO)
cycles
output
Table 6-27. External ADC Start-of-Conversion Switching Characteristics
PARAMETER
MIN
MAX
UNIT
tw(ADCSOCAL)
Pulse duration, ADCSOCAO low
32tc(HCO )
cycles
Copyright 2009–2012, Texas Instruments Incorporated
Electrical Specifications
121
Product Folder Link(s): SM320F28335-EP
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