SPRS581D – JUNE 2009 – REVISED MAY 2012
List of Tables
2-1
Hardware Features
..............................................................................................................
122-2
Signal Descriptions
...............................................................................................................
223-1
Addresses of Flash Sectors
....................................................................................................
343-2
Handling Security Code Locations
.............................................................................................
343-3
Wait-states
........................................................................................................................
353-4
Boot Mode Selection
.............................................................................................................
383-5
Peripheral Frame 0 Registers
..................................................................................................
433-6
Peripheral Frame 1 Registers
..................................................................................................
433-7
Peripheral Frame 2 Registers
..................................................................................................
443-8
Peripheral Frame 3 Registers
..................................................................................................
443-9
Device Emulation Registers
.....................................................................................................
443-10
PIE Peripheral Interrupts
.......................................................................................................
473-11
PIE Configuration and Control Registers
......................................................................................
483-12
External Interrupt Registers
.....................................................................................................
483-13
PLL, Clocking, Watchdog, and Low-Power Mode Registers
...............................................................
513-14
PLLCR Bit Descriptions
.........................................................................................................
533-15
CLKIN Divide Options
...........................................................................................................
533-16
Possible PLL Configuration Modes
............................................................................................
533-17
Low-Power Modes
...............................................................................................................
554-1
CPU-Timers 0, 1, 2 Configuration and Control Registers
...................................................................
594-2
ePWM Control and Status Registers (default configuration in PF1)
.......................................................
614-3
ePWM Control and Status Registers (remapped configuration in PF3 - DMA accessible)
.............................
624-4
eCAP Control and Status Registers
...........................................................................................
674-5
eQEP Control and Status Registers
...........................................................................................
694-6
ADC Registers
...................................................................................................................
734-7
McBSP Register Summary
......................................................................................................
774-8
3.3-V eCAN Transceivers
......................................................................................................
794-9
CAN Register Map
..............................................................................................................
824-10
SCI-A Registers
..................................................................................................................
844-11
SCI-B Registers
..................................................................................................................
844-12
SCI-C Registers
.................................................................................................................
844-13
SPI-A Registers
...................................................................................................................
874-14
I2C-A Registers
...................................................................................................................
904-15
GPIO Registers
..................................................................................................................
924-16
GPIO-A Mux Peripheral Selection Matrix
....................................................................................
934-17
GPIO-B Mux Peripheral Selection Matrix
....................................................................................
944-18
GPIO-C Mux Peripheral Selection Matrix
....................................................................................
954-19
XINTF Configuration and Control Register Mapping
........................................................................
986-1
Current Consumption by Power-Supply Pins at 150-MHz SYSCLKOUT
...............................................
1026-2
Typical Current Consumption by Various Peripherals (at 150 MHz)
....................................................
1036-3
Clocking and Nomenclature (150-MHz devices)
............................................................................
1086-4
Clocking and Nomenclature (100-MHz devices)
............................................................................
1086-5
Input Clock Frequency
.........................................................................................................
1096-6
XCLKIN Timing Requirements - PLL Enabled
.............................................................................
1096-7
XCLKIN Timing Requirements - PLL Disabled
.............................................................................
1096-8
XCLKOUT Switching Characteristics (PLL Bypassed or Enabled)
......................................................
1096-9
Power Management and Supervisory Circuit Solutions
...................................................................
110Copyright 2009–2012, Texas Instruments Incorporated
List of Tables
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