參數(shù)資料
型號(hào): SPC563M64L5COAY
廠商: STMICROELECTRONICS
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 80 MHz, MICROCONTROLLER, PQFP144
封裝: 20 X 20 MM, LEAD FREE, LQFP-144
文件頁數(shù): 59/140頁
文件大?。?/td> 1310K
代理商: SPC563M64L5COAY
Overview
SPC563M64
Doc ID 14642 Rev 6
The flash memory provides the following features:
Supports a 64-bit data bus for instruction fetch, CPU loads and DMA access. Byte,
halfword, word and doubleword reads are supported. Only aligned word and
doubleword writes are supported.
Fetch Accelerator
Architected to optimize the performance of the flash with the CPU to provide single
cycle random access to the flash up to 80 MHz system clock speed
Configurable read buffering and line prefetch support
Four line read buffers (128 bits wide) and a prefetch controller
Hardware and software configurable read and write access protections on a per-master
basis
Interface to the flash array controller is pipelined with a depth of one, allowing
overlapped accesses to proceed in parallel for interleaved or pipelined flash array
designs
Configurable access timing allowing use in a wide range of system frequencies
Multiple-mapping support and mapping-based block access timing (0-31 additional
cycles) allowing use for emulation of other memory types
Software programmable block program/erase restriction control
Erase of selected block(s)
Read page size of 128 bits (four words)
ECC with single-bit correction, double-bit detection
Program page size of 128 bits (four words) to accelerate programming
ECC single-bit error corrections are visible to software
Minimum program size is two consecutive 32-bit words, aligned on a 0-modulo-8 byte
address, due to ECC
Embedded hardware program and erase algorithm
Erase suspend, program suspend and erase-suspended program
Shadow information stored in non-volatile shadow block
Independent program/erase of the shadow block
1.3.10
SRAM
The SPC563Mxx SRAM module provides a general-purpose up to 94 KB memory block.
The SRAM controller includes these features:
Supports read/write accesses mapped to the SRAM memory from any master
32 KB or 24 KB block powered by separate supply for standby operation
Byte, halfword, word and doubleword addressable
ECC performs single-bit correction, double-bit detection on 32-bit data element
1.3.11
BAM
The BAM (Boot Assist Module) is a block of read-only memory that is programmed once by
ST and is identical for all SPC563Mxx MCUs. The BAM program is executed every time the
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