XRT74L74
4 CHANNEL, ATM UNI/PPP DS3/E3 FRAMING CONTROLLER
PRELIMINARY
REV. P1.1.1
119
within the “TxCP Control” Register, as depicted be-
low.
A “1” in this bit-field will enable this modulo addition.
Conversely, a “0” in this bit-field will disable this
operation.
Upon power up or reset, the Transmit Cell Processor
will be configured such that the coset polynomial is
modulo-2 added to the HEC byte prior to insertion in-
to the cell. A “0” must be written to this bit to disable
this operation.
3.2.2.1.4
Inserting Errors into the HEC Byte
via Software Control
The XRT74L74 DS3/E3 UNI allows the user to insert
errors into the HEC bytes of “outbound” cells in order
to support equipment testing. One such test that the
user may wish to verify is that the HEC byte verifica-
tion (e.g., error detection and/or correction) features
of some “Far-End” terminal equipment is functioning
properly. The user would conduct this test by trans-
mitting cells with erroneous HEC byte values to the
“unit under test” (UUT). This option can be exercised
by writing the appropriate data into the TxCP Error
Mask register, which is located at address 62h within
the UNI.
The Transmit Cell Processor automatically XORs the
HEC Byte (or each “outbound” cell) with the contents
of this register. The result of this operation is written
back into the fifth octet position of each of these cells.
To prevent injecting errors into the HEC byte, the con-
tents of this register must be set to 00h, the default
value.
3.2.2.2
The Cell Scrambler takes bytes 6 through 53 of each
cell (the payload) and scrambles the contents of these
The Cell Scrambler
bytes. The purpose of scrambling the cell payload
bytes is to reduce the possibility of the contents of the
cell payload mimicking patterns that are used for
framing and cell delineation purposes. The scrambler
generating polynomial is x
43
+ 1. The Cell Scrambler
can be enabled or disabled by setting or clearing bit 7
(Scrambler Enable) within the “TxCP Control” Register,
as depicted below.
A “1” in this bit-field enables the Cell Scrambler. Con-
versely, a “0” in this bit-field disables the Cell-Scrambler.
TxCP Control Register (Address = 60h)
B
IT
7
B
IT
6
B
IT
5
B
IT
4
B
IT
3
B
IT
2
B
IT
1
B
IT
0
Scrambler
En
Coset
Enable
HEC Insert
Enable
TDPChk
Pattern
GFC Insert
Enable
TDPErr
Interrupt
Enable
Idle Cell
HEC CalEn
TDPErr
Interrupt
Status
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RUR
TxCP Error Mask Register; (Address = 62h)
B
IT
7
B
IT
6
B
IT
5
B
IT
4
B
IT
3
B
IT
2
B
IT
1
B
IT
0
HEC Error Mask Byte
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
TxCP Control Register (Address = 60h)
B
IT
7
B
IT
6
B
IT
5
B
IT
4
B
IT
3
B
IT
2
B
IT
1
B
IT
0
Scrambler
Enable
Coset
Enable
HEC Insert
Enable
TDPChk
Pattern
GFC Insert
Enable
TDPErr
Interrupt
Enable
Idle Cell
HEC CalEn
TDPErr
Interrupt
Status
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RUR
x
1
1
1
0
0
1
0