XRT74L74
4 CHANNEL, ATM UNI/PPP DS3/E3 FRAMING CONTROLLER
ADVANCED CONFIDENTIAL
REV. P1.1.1
202
If the XRT74L74 has been configured to operate in
this mode, then the XRT74L74 will function as fol-
lows.
A. Local Timing - (Uses the TxInClk signal as the
Timing Reference)
In this mode, the Transmit Section of the XRT74L74
will use the TxInClk signal as its timing reference.
B. Serial Mode
The XRT74L74 will receive the DS3 payload data, in
a serial manner, via the TxSer input pin. The Trans-
mit Payload Data Input Interface (within the
XRT74L74) will latch this data into its circuitry, on the
rising edge of the TxInClk input clock signal.
C. Delineation of outbound DS3 frames (Frame
Master Mode)
The Transmit Section of the XRT74L74 will use the
TxInClk signal as its timing reference, and will initiate
DS3 frame generation, asynchronously with respect
to any externally applied signal. The XRT74L74 will
pulse its TxFrame output pin "High" whenever it is
processing the very last bit-field within a given DS3
frame.
D. Sampling of payload data, from the Terminal
Equipment
In Mode 3, the XRT74L74 will sample the data, at the
TxSer input pin, on the rising edge of TxInClk.
Interfacing the Transmit Payload Data Input Inter-
face block of the XRT74L74 to the Terminal Equip-
ment for Mode 3 Operation
Figure 55 presents an illustration of the Transmit Pay-
load Data Input Interface block (within the XRT74L74)
being interfaced to the Terminal Equipment, for Mode
3 operation.
Mode 3 Operation of the Terminal Equipment
In Figure 55, both the Terminal Equipment and the
XRT74L74 are driven by an external 44.736MHz
clock signal. This clock signal is connected to the
DS3_Clock_In input of the Terminal Equipment and
the TxInClk input pin of the XRT74L74.
The Terminal Equipment will serially output the pay-
load data on its DS3_Data_Out output pin, upon the
rising edge of the signal at the DS3_Clock_In input
pin. Similarly, the XRT74L74 will latch the data, resid-
ing on the TxSer input pin, on the rising edge of TxIn-
Clk.
The XRT74L74 will pulse the TxFrame output pin
"High" for one bit-period, coincident while it is pro-
cessing the last bit-field within a given outbound DS3
frame. The Terminal Equipment is expected to moni-
tor the TxFrame signal (from the XRT74L74) and to
place the first bit, within the very next outbound DS3
frame on the TxSer input pin.
N
OTE
:
In this case, the XRT74L74 dictates exactly when
the very next DS3 frame will be generated.
F
IGURE
55. I
LLUSTRATION
OF
THE
T
ERMINAL
E
QUIPMENT
BEING
INTERFACED
TO
THE
T
RANSMIT
P
AYLOAD
D
ATA
I
NPUT
I
NTERFACE
BLOCK
OF
THE
XRT74L74
FOR
M
ODE
3 (S
ERIAL
/L
OCAL
-T
IMED
/F
RAME
-M
ASTER
) O
PERATION
Terminal Equipment
XRT72L5x DS3 Framer
DS3_Data_Out
DS3_Clock_In
Tx_Start_of_Frame
DS3_Overhead_Ind
TxSer
TxInClk
TxFrame
TxOH_Ind
NibIntf
44.736 MHz Clock
Source