參數(shù)資料
型號: XRT86VL3x
廠商: Exar Corporation
元件分類: 通信及網(wǎng)絡(luò)
英文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù): 31/153頁
文件大?。?/td> 1316K
代理商: XRT86VL3X
XRT86VL3X
24
REV. 1.2.2
T1/E1/J1 FRAMER/LIU COMBO - ARCHITECTURE DESCRIPTION
3.4
Receive HDLC Event Timing
The following figure shows the event timing of RxEOT and RxIDLE when receiving HDLC message.
3.5
SS7 (Signaling System Number 7) for ESF in DS1 Only
To support SS7 specifications while receiving LAPD messages, EXAR’s Framer will generate an interrupt (if
SS7 is enabled) once the HDLC controllers have received more than 276 bytes within two flag sequences
(0x7E) of a LAPD message. Each HDLC controller supports SS7. For example: To enable SS7 for all HDLC
controllers, registers 0xnB11 (LAPD1), 0xnB19 (LAPD2), 0xnB29 (LAPD3) must be set to 0x01.
F
IGURE
32. R
ECEIVE
HDLC E
VENT
T
IMING
96-Bytes
4-Bytes
7E
7E
7E
7E
7E
LAPD
RxEOT
RxIDLE
96-Bytes
7E
7E
7E
7E
7E
LAPD
RxEOT
RxIDLE
75-Bytes
7E
7E
7E
LAPD
RxEOT
RxIDLE
Figure a. Receiving a 100-Byte Message
Figure c. Receiving a 75-Byte Message
Figure b. Receiving a 96-Byte Message
相關(guān)PDF資料
PDF描述
XRT86VL3X_07 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT86VL3X Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT91L30_0611 STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER
XRT91L306 STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER
XRT91L30IQ STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XRT86VL3X_07 制造商:EXAR 制造商全稱:EXAR 功能描述:T1/E1/J1 FRAMER/LIU COMBO - ARCHITECTURE DESCRIPTION
XRT86VL3X_0710 制造商:EXAR 制造商全稱:EXAR 功能描述:T1/E1/J1 FRAMER/LIU COMBO - ARCHITECTURE DESCRIPTION
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XRT86VX38_09 制造商:EXAR 制造商全稱:EXAR 功能描述:8-CHANNEL T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
XRT86VX38_0906 制造商:EXAR 制造商全稱:EXAR 功能描述:OCTAL T1/E1/J1 FRAMER/LIU COMBO - HARDWARE DESCRIPTION