參數(shù)資料
型號： XRT86VL3x
廠商： Exar Corporation
元件分類： 通信及網(wǎng)絡(luò)
英文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù)： 86/153頁
文件大?。?/td> 1316K
代理商： XRT86VL3X
XRT86VL3X
79
T1/E1/J1 FRAMER/LIU COMBO - ARCHITECTURE DESCRIPTION
REV. 1.2.2
Transmit 16.384 Bit-Multiplexed Mode
Please refer to Figure 85 for how to interface the transmit payload data input interface block to the terminal
equipment. The local Terminal Equipment maps four 1.544Mbit/s DS1 data streams into this 16.384Mbit/s data
stream as described below:
1.
The F-bit of four channels are repeated and grouped together to form the first octet of the multiplexed data
stream. The F-bit of Channel 0 is sent first, followed by F-bit of Channel 1 and 2. The F-bit of Channel 3 is
sent last. The table below shows bit-pattern of the first octet.
F
X
: F-bit of Channel X
2.
After the first octet of data is sent, the local Terminal Equipment should insert seven octets (fifty-six bits) of
"don't care" data into the outgoing data stream.
3.
Payload data of four channels are repeated and grouped together in a bit-interleaved way. The first pay-
load bit of Timeslot 0 of Channel 0 is sent first, followed by the first payload bit of Timeslot 0 of Channel 1
and 2. The first payload bit of Timeslot 0 of Channel 3 is sent last. After the first bits of Timeslot 0 of all four
channels are sent, it comes the second bit of Timeslot 0 of Channel 0 and so on. The table below demon-
strates how payload bits of four channels are mapped into the 16.384Mbit/s data stream.
X
Y
: The Xth payload bit of Channel Y
4.
The local Terminal Equipment also multiplexed signaling bits with payload bits and sent them together
through the 16.384Mbit/s data stream. When the Terminal Equipment is sending the fifth payload bit of
each channel, instead of sending it twice, it inserts the signaling bit A of that corresponding channel. Simi-
larly, the sixth payload bit of each channel is followed by the signaling bit B of that channel; the seventh
payload bit is followed by the signaling bit C; the eighth payload bit is followed by the signaling bit D.
F
IGURE
86. T
IMING
S
IGNALS
W
HEN
THE
T
RANSMIT
F
RAMER
IS
R
UNNING
AT
12.352 B
IT
-M
ULTIPLEXED
M
ODE
B
IT
0
B
IT
1
B
IT
2
B
IT
3
B
IT
4
B
IT
5
B
IT
6
B
IT
7
F
0
F
0
F
1
F
1
F
2
F
2
F
3
F
3
B
IT
0
B
IT
1
B
IT
2
B
IT
3
B
IT
4
B
IT
5
B
IT
6
B
IT
7
1
0
1
0
1
1
1
1
1
2
1
2
1
3
1
3
B
IT
0
B
IT
1
B
IT
2
B
IT
3
B
IT
4
B
IT
5
B
IT
6
B
IT
7
2
0
2
0
2
1
2
1
2
2
2
2
2
3
2
3
TxInClk (12.352MHz)
TxInClk (INV)
TxSer
TxSync(input)
F
0
F
0
F
1
F
1
F
2
F
2
F
3
F
3
1
0
X 1
1
X
X
X
1
2
1
3
2
0
X 2
1
X
X
3
0
4
0
X
5
0
A
0
5
1
A
1
5
2
A
2
5
3
A
3
6
0
B
0
6
1
B
1
6
2
B
2
6
3
B
3
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