參數(shù)資料
型號(hào)： 21329
英文描述： AMD-K6 Processor Power Supply Design Application Note AMD-K6 Processor Bios Design Application Note
中文描述： 的AMD - K6處理器電源設(shè)計(jì)應(yīng)用指南的AMD - K6處理器的BIOS設(shè)計(jì)中的應(yīng)用說(shuō)明
文件頁(yè)數(shù)： 31/52頁(yè)
文件大?。?/td> 687K
代理商： 21329
Model-Specific Registers (MSRs)
21
21329L/0—December 1999
AMD-K6
Processor BIOS Design
Figure 5. Extended Feature Enable Register (EFER)—MSR C000_0080h (Model 8/[F:8])
EWBE Control.
The AMD-K6-2 processor Model 8/[F:8] contains
an 8-byte write merge buffer that allows the processor to
conditionally combine data from multiple noncacheable write
cycles into this merge buffer. The merge buffer operates in
conjunction with the Memory Type Range Registers (MTRRs).
Refer to “UC/WC Cacheability Control Register (UWCCR)” on
page 26 for a description of the MTRRs.
Merging multiple write cycles into a single write cycle reduces
processor bus utilization and processor stalls, thereby
increasing the overall system performance.
The presence of the merge buffer creates the potential to
perform out-of-order write cycles relative to the processor’s
Table 9.
Extended Feature Enable Register (EFER) Definition (Model 8/[F:8])
Bit
Description
R/W
Function
63–4
Reserved
R
Writing a 1 to any reserved bit causes a general protection
fault to occur. All reserved bits are always read as 0.
This 2-bit field controls the behavior of the processor with
respect to the ordering of write cycles and the EWBE# signal.
EFER[3] and EFER[2] are Global EWBE Disable (GEWBED)
and Speculative EWBE Disable (SEWBED), respectively.
DPE must be set to 1 to enable data prefetching (this is the
default setting following reset). If enabled, cache misses
initiated by a memory read within a 32-byte cache line are
conditionally followed by cache-line fetches of the other line
in the 64-byte sector.
SCE must be set to 1 to enable the usage of the SYSCALL and
SYSRET instructions.
3-2
EWBE Control (EWBEC)
R/W
1
Data Prefetch Enable (DPE)
R/W
0
System Call Extension (SCE)
R/W
1
0
63
S
C
E
Reserved
Description
EWBE Control
Data Prefetch Enable
System Call Extension
2
3
4
D
P
E
EWBEC
Symbol
EWBEC
DPE
SCE
Bit
3-2
1
0
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