- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄371369 > 21329 AMD-K6 Processor Power Supply Design Application Note AMD-K6 Processor Bios Design Application Note PDF資料下載
參數(shù)資料
| 型號： | 21329 |
| 英文描述： | AMD-K6 Processor Power Supply Design Application Note AMD-K6 Processor Bios Design Application Note |
| 中文描述： | 的AMD - K6處理器電源設(shè)計應(yīng)用指南的AMD - K6處理器的BIOS設(shè)計中的應(yīng)用說明 |
| 文件頁數(shù)： | 52/52頁 |
| 文件大?。?/td> | 687K |
| 代理商： | 21329 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁當(dāng)前第52頁
42
Additional Considerations
AMD-K6
Processor BIOS Design
21329L/0—December 1999
Pipelining Support
All production models and steppings of the AMD-K6 processor
support the WAELIM form of write allocate, which is the only
form of write allocate that should be enabled. AMD does not
recommend enabling the obsolete form of write allocate
(WCDE) because system performance can be degraded by
doing so.
Early implementations of the AMD-K6 processor did not
support the WHCR register and therefore did not support the
WAELIM form of write allocate. WCDE was the only form of
write allocate supported, which required the chipset to assert
KEN# for cacheable memory write cycles. Because KEN# is
sampled by the processor on the clock edge on which the first
BRDY# or NA# is sampled asserted, some chipsets that
supported the WCDE form of write allocate did not assert NA#
during write cycles in order to prevent the processor from
sampling KEN# before it was valid (in this case, BRDY# was
used by the processor to sample KEN#). If NA# is not asserted
during memory write cycles, then the processor does not fully
take advantage of the potential performance gains that bus
pipelining can achieve.
For proper functionality, always program the WCDE bit to 0 for
Models 6, 7, and 8/[7:0]. Models 8/[F:8] and 9 do not support the
WCDE bit.
Read-Only Memory
The processor’s caches must be flushed prior to defining any
area of memory as cacheable and read only. (The BIOS is
typically “shadowed” into main memory and defined as
cacheable and read only.) If the caches are not flushed, then a
line that resides in the processor’s cache that falls within a read-
only area of memory can be written to, which would place the
cache line in the modified state. If this modified line is
subsequently replaced and written back to memory, then the
system may hang (or other unpredictable effects may occur)
because the writeback is directed to an area of memory defined
as read only by the chipset.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 21340-AB | LAN Hub Controller |
| 21440-AA | LAN Hub Controller |
| 21440 | Multiport 10/100Mb/s Ethernet Controller(多端口10/100Mb/s 以太網(wǎng)控制器) |
| 21446 | Net186-EVAL-KT? 24.9KB (PDF) |
| 2145 | MONITORKABEL SUN BUCHSE SVGA STECKER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 21329-001-XTD | 制造商:ON Semiconductor 功能描述:RISK PRODUCTION UNITS |
| 213293-000 | 制造商:TE Connectivity 功能描述:D-SCE-5K-2.4-50-S1-4 - Bulk 制造商:TE Connectivity 功能描述:Heat Shrink Marker ST Polyolefin Yellow |
| 213294-1 | 制造商:TE Connectivity 功能描述:CONN HOUSING M 34 POS ST - Bulk 制造商:TE Connectivity 功能描述:PLUG HSG,34 POSN,M SERIES |
| 2132A 0031000 | 功能描述:CBL 16PR 16AWG SHLD 制造商:belden inc. 系列:* 零件狀態(tài):在售 標(biāo)準(zhǔn)包裝:1 |
| 2132A 0061000 | 功能描述:CBL 16PR 16AWG SHLD 制造商:belden inc. 系列:* 零件狀態(tài):在售 標(biāo)準(zhǔn)包裝:1 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。